Wafer masking

FIGURE 9.11 SKW tungsten line test wafer mask floor plan (from Ref. 13). 

Fig. 38. Diagram comparing the optical characteristics of a standard binary chrome mask with a phase-shift mask. The changes in the electric fields introduced by the phase-shift elements result in a sharper light intensity profile at the wafer surface.

Two newer areas of implantation have been receiving attention and development. Focused ion beams have been iavestigated to adow very fine control of implantation dimensions. The beams are focused to spot sizes down to 10 nm, and are used to create single lines of ion-implanted patterns without needing to create or use a mask. Although this method has many attractive features, it is hampered by the fact that the patterning is sequential rather than simultaneous, and only one wafer rather than many can be processed at any one time. This limits the production appHcations of the technique. 

Optical Lithography. Optical Hthography uses visible or ultraviolet light as the exposure media, and is the dominant Hthographic process used for patterning IC wafers. The linewidth limit is near 0.4 p.m, although some narrower features may be possible (34). The masks typically are made from patterned, opaque chromium films on glass. 

Wafer is forcefully pushed into contact with mask... 

These processes are considerably more complex in actual CMOS fabrication. First, the lower layers of a CMOS stmcture typically have a twin-tub design which includes both PMOS and NMOS devices adjacent to each other (see Fig. 3b). After step 1, a mask is opened such that a wide area is implanted to form the -weU, followed by a similar procedure to create the -weU. Isolation between active areas is commonly provided by local oxidation of sihcon (LOCOS), which creates a thick field oxide. A narrow strip of lightly doped drain (LDD) is formed under the edges of the gate to prevent hot-carrier induced instabiUties. Passivation sidewalls are used as etch resists. A complete sequence of fabrication from wafer to packaged unit is shown in Figure 10. 

Electrochemical experiments have been carried out on materials deposited by PVD on silicon microfabricated arrays of Au pad electrodes [Guerin et al., 2006a]. The substrate is made up of a square silicon wafer capped with silicon nitride (31.8 mm x 31.8 mm), which has an array of 100 individually addressable Au pad electrodes. These electrodes make up a square matrix on the wafer, which can be masked when placed in a PVD chamber, allowing deposition of thin films on the Au electrodes. Figure 16.3 is a schematic drawing of the configuration. Small electrical contact pads in Au for the individual addressing of electrodes (0.8 mm x 0.8 mm) are placed on the boundaries. 

Figure 16.2 Thickness determination of An deposition onto a bare silicon wafer using a 10 x 10 contact mask in two geometries (see insets), using (a) AFM along the diagonal of an array of 100 electrodes and (b) AFM and ellipsometry for a deposition geometry that allowed an average of 10 fields of identical thickness across the wedge. The source temperatures and deposition times were (a) 1548K, 7200 s and (b) 1623K and 4500 s.

The polymers were dissolved in methylisobutylketone (MIBK) and spin-coated on oxjdized silicon wafers (1100 X thick Si02 layers) to form 5000 A thick films. After a prebaking to improve adhesion to the substrate, the resist samples were irradiated 0 through the mask (A) using the Al K 152 emission line at 8.3 A as X-ray source. The electron beam gun was operated at a 300 W power and the source to sample distance was U.9 cm. Taking into account the absorption of the aluminum foil mask,the different X-ray fluxes available on the sample were calculated from the relation given by (9) ... 

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