Lightly-doped drain

These processes are considerably more complex in actual CMOS fabrication. First, the lower layers of a CMOS stmcture typically have a twin-tub design which includes both PMOS and NMOS devices adjacent to each other (see Fig. 3b). After step 1, a mask is opened such that a wide area is implanted to form the -weU, followed by a similar procedure to create the -weU. Isolation between active areas is commonly provided by local oxidation of sihcon (LOCOS), which creates a thick field oxide. A narrow strip of lightly doped drain (LDD) is formed under the edges of the gate to prevent hot-carrier induced instabiUties. Passivation sidewalls are used as etch resists. A complete sequence of fabrication from wafer to packaged unit is shown in Figure 10. 

The field effect transistors are well-known micro-sized electronic devices that are broadly used in electronic circuits. They are made of a small swab of the silicon substrate. The substrate is lightly p-doped. Two discrete spots placed in a certain distance from each other are strongly n-doped. One of these spots is called the source, while the other is called the drain. If voltage is applied between the source and the drain, then no current flows since the p-doped substrate acts like an insulator between the two n-doped spots. The area above the substrate between the drain and the source is prepared close to the surface but electrically insulated. It is called the Gate. 

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