Vertical wafer

CVD reactors can have one of several configurations. Each has particular advantages and disadvantages. Reactors that support wafers horizontally have difficulty controlling the deposition uniformity over all the exposed wafers. Reactors having vertical wafer support produce uniform deposition, but are mechanically complex. Barrel reactors are not suited for extended operation at temperatures greater than 1200°C. 

Finally, in 1985, the results of an extensive investigation in which adsorjDtion took place onto an aluminium oxide layer fonned on a film of aluminium deposited in vacuo onto a silicon wafer was published by Allara and Nuzzo 1127, 1281. Various carboxylic acids were dissolved in high-purity hexadecane and allowed to adsorb from this solution onto the prepared aluminium oxide surface. It was found that for chains with more than 12 carbon atoms, chains are nearly in a vertical orientation and are tightly packed. For shorter chains, however, no stable monolayers were found. The kinetic processes involved in layer fonnation can take up to several days. 

Fig. 10. Cross-sectional drawing of a vertical cavity surface emitting laser (VCSEL). Proton implantation is used to channel the current through a small active region. Light is emitted in the direction perpendicular to the plane of the wafer. This makes preparation of two-dimensional arrays quite easy.

Fig. 22. Schematics of chemical vapor deposition epitaxial reactors (a) horizontal reactor, (b) vertical pedestal reactor, (c) multisubstrate rotating disk reactor, (d) barrel reactor, (e) pancake reactor, and multiple wafer-in-tube reactor (38).

In some cases, the parts to be coated (such as semiconductor silicon wafers) are stacked vertically. This minimizes particle contamination and considerably increases the loading capacity (as opposed to horizontal loading). 

Figure 18 [28] shows the variation of the particle speed and the potential energy of the silicon wafer in the collision process. The dashed line means the speed of the particle in the vertical direction and the black one indicates the variation of potential energy of the silicon disk. When the particle penetrates into the wafer surface, its vertical speed becomes lower and lower. Once the particle reaches the deepest position, the speed of the particle becomes zero and the potential energy of the silicon wafer increases to the highest one, and... 

FIG. 13 Top-. SPFM image of the spreading front of a smectic drop of 8CB liquid crystal on a Si wafer, showing a layered structure. Each layer is 32 A thick. The layers advance in the direction of the arrow at the rate of 20-30 A/s at room temperature. Middle-. Profile of the droplet front showing the steps. Bottom-. Drop and surrounding smectic layers. Vertical scale is greatly exaggerated. (From Ref. 62.)... 

Tishinin, D.V., Dapkus, P.D., Bond, A.E., Kim, L, Lin, C.K., and O Brien, J., 1999, Vertical resonant couplers with precise coupling efficiency control fabricated by wafer bonding, IEEE Photon. Technol. Lett. 11(8) 1003-1005. 

Incident beam in (110) plane, reciprocal lattice section perpendicular to [1 0], Case (b) would occur if the incident beam were parallel or perpendicular to the plane of the (110) flat cut on many semiconductor wafers. Many more reflections are available in case (b). The semicircular segments showing accessible and inaccessible reflections are sections of hemispheres whose axes are vertical on this diagram... 

For a one-material case, analytic solutions exist for both the deformation profile of the elastic material as well as the pressure and stress distributions for the indenter (approximating wafer features). Consider a single-layer pad that is thick relative to the vertical deformation and has a deformation force applied over a circular region of radius a. The deformation is given by a set of two equations that represent deformations within and outside the circular radius over which the force is applied. The deformation at any radius r less than a is given by [59] ... 

After each growth cycle, the reactors must be opened, the wafers removed, and the lower portion of the reactor physically cleaned. The lower quartz reactor and the bottom plate (base plate) are scraped clean using a metal tool, and the particulate material (mixture of GaAs, GaAsP, arsenic oxides and phosphorus oxides) is collected in a metal container positioned below the vertical reactor. 

Adhesion is an important ingredient in the fabrication of integrated circuits (ICs). These circuits are fabricated by placing layer upon layer vertically from the silicon crystal wafer surface until the entire circuit or device is completed (see Fig. 1). These thin layers (i.e. 0.2-3.0 /zm) must all adhere intimately for the device to function as designed, even though some of these layers are applied under a significant amount of stress. 

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