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System architect’s workbench

Thomas, D R, Lagnese, R D., Walker, RA., Nestor, J. A., Rqan, J. V. and Blackburn, R L (1990) Algnithmic and Register-Transfer Level Synthesis The System Architect s Workbench. Kluwer Academic Publishers. [Pg.289]

R. A. Walker and D. E. Thomas. Design representation and transformation in the system architect s workbench. Proc. of the Int. Conf on Comp. Aided Design, pages 166-169, 1987. [Pg.46]

R.A. Walker and D.E. Thomas, Design Representation and Transformation in the System Architect s Workbench, Proceedings of the ICCAD 87, pp. 166-169, Santa Clara, CA, November 1987. [Pg.35]

Venetsanopoulos, ISBN 0-7923-9049-0 A Igorithmic and Register-Transfer Level SynAesis The System Architect s Workbench, D.E. Thomas, ED. Lagnese, R-A. Walker, J.A Nestor, J.V. Ragan, R.L.Blackbum, ISBN 0-7925-9053-9... [Pg.186]

This book presents the results of several coordinated research projects, collectively referred to as the System Architect s Workbench the Workbench). These research projects were Ph.D. Theses completed under the direction of Professor Donald Thomas and granted by the Electrical and Computer Engineering Department of Carnegie Mellon University. The research described here fits into the first two design steps of Figure 1-1 and can be grouped into three major categories ... [Pg.7]

The goal of the System Architect s Workbench project is to do research in the areas of Algorithmic and Register-Transfer Level synthesis, and to develop demonstration design tools to support the research. A diagram of the Workbench is shown in Figure 1-4. [Pg.8]

At the beginning, we highlighted several differences in the approaches taken in the two paths through the System Architect s Workbench. These differences were the use of style-specific vs. general synthesis algorithms, the handling of interactions between synthesis steps, and the method of knowledge representation. [Pg.275]

Design Representation and Transformation in The System Architect s Workbench. [Pg.296]

ALGORITHMIC AND REGISTER-TRANSFER LEVEL SYNTHESIS THE SYSTEM ARCHITECT S WORKBENCH... [Pg.306]

Algorithmic and register-transfer level synthesis the system architect s workbench / by D.E. Thomas. .. let al.]. [Pg.309]

D.E. Thomas et al, "The System Architect s Workbench", Proceedings of the 25th Design Automation Conference, July 1988, pp. 337-343. [Pg.281]

This chapter will overview the System Architect s Workbench and the improvements and extensions made to it for this project. Experiences with three industrial designs will then be presented. [Pg.308]

Similar models are used in existing high-level synthesis systems. They include DACON in Flamel [Tri87], YIF in YSC [BCM+88], sequence, data-flow, and control graphs in the Caddy system [CR89], Value Trace in CMU s System Architect s Workbench [TDW+90], and CDFG in Elf [GK84]. [Pg.61]

TDW+ 90] D. Thomas, E. Dirkes, R. Walker, J. Rajan, J. Nestor, and R. Black-bum. The System Architect s Workbench. In Proceedings of the Design Automation Conference, June 1990. [Pg.288]


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See also in sourсe #XX -- [ Pg.308 ]




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