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Logic families

Emitter-Coupled Logic. A logic family based on bipolar transistor pairs connected via their emitters. ECL avoids saturation of the transistors and has a signal delay widely independent of the temperature. ECL is very fast but also power-consuming. It is used in communication devices and fast timing electronics. [Pg.415]

Technically speaking, active logic gates found in the various types of logic families are also amplifiers since they offer power gain in their abiUty to drive relatively low-impedance loads, while not acting as a significant load themselves. [Pg.577]

TABLE 8.7 Speed-Product Comparison for Popular Discrete Logic Families ... [Pg.739]

For the researcher, the IEEE Journal of Solid State Circuits is perhaps the best single source of information about advances in digital logic. The IEEE sponsors a number of conferences annually that deal in one way or another with digital logic families and programmable logic. [Pg.755]

D/A converter ICs often include special features that enable them to be interfaced easily to microprocessors or other systems. Microprocessor control inputs, input latches, buffers, input registers, and compatibility to standard logic families are features that are readily available in D/A ICs. In addition, the ICs usually have laser-trimmed precision resistors to eliminate the need for user trimming to achieve... [Pg.786]

How much shielding is required at the box level to comply with FCC Parts 15.B or CISPR 22, Class B (residential locations) Naturally, this depends on the complexity and number of PCBs, the clock frequency, the logic family, etc. At the risk of generalizing, however, if little EMI control is exercised at the PCB level, roughly 40 dB of shielding effectiveness will be required for the entire box over the frequency range of roughly 50-500 MHz. [Pg.1320]

Noise-immiuiity level The voltage threshold in digital logic families above which a logic zero may be sensed as a one and vice versa. [Pg.1328]

TABLE 13.2 Typical Logic Family Switching Speeds... [Pg.285]

Logic family Edge speed, ns Critical length, in... [Pg.285]

Logic family Typical rise/fall time, ns Logic family Typical rise/fall time, ns... [Pg.319]

The electrical signal integrity of the rise and fall times of electrical signals is a major driver and concern for high-speed and high-frequency printed circuits. Table 15.2 lists some of the typical rise and fall times of some of the popular digital logic families. [Pg.319]

Parallel Outputs Parallel outputs require more pins on an ROIC than do serial outputs. Outputs may be the same logic family as the input clocks or pseudo-LVDS (or emitter-coupled logic (ECL), but that is rarely used now). [Pg.246]


See other pages where Logic families is mentioned: [Pg.353]    [Pg.353]    [Pg.747]    [Pg.306]    [Pg.503]    [Pg.707]    [Pg.708]    [Pg.727]    [Pg.739]    [Pg.739]    [Pg.739]    [Pg.740]    [Pg.743]    [Pg.750]    [Pg.788]    [Pg.1274]    [Pg.2015]    [Pg.2557]    [Pg.12]    [Pg.50]    [Pg.285]    [Pg.286]    [Pg.308]    [Pg.319]    [Pg.459]    [Pg.83]   
See also in sourсe #XX -- [ Pg.157 ]




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