Emitter Coupled Logic

The use of Emitter Coupled Logic (ECL) is also possible [Blood, 1980] [Hastings, 1987] but it suffers because of low levels of integration (typically 2 and 4 bit wide parts) as well a high demands for current and fans. In spite of these limitations, the group at Lucasfilm used ECL technology for the ASP [Moorer et al., 1986], For the... 

Emitter-Coupled Logic. A logic family based on bipolar transistor pairs connected via their emitters. ECL avoids saturation of the transistors and has a signal delay widely independent of the temperature. ECL is very fast but also power-consuming. It is used in communication devices and fast timing electronics. 

FIGURE 8.39 Emitter coupled logic (ECL) gates (a) simplified schematic of ECL NOR gate, (b) commercial ECL gate. 

Parallel Outputs Parallel outputs require more pins on an ROIC than do serial outputs. Outputs may be the same logic family as the input clocks or pseudo-LVDS (or emitter-coupled logic (ECL), but that is rarely used now). 

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