Etching with second masking layer

Figure 2.5 Etching with a second masking layer.

Step 11. If no additional metallisa tion layers are required, the substrate is covered with a passivation layer. If additional levels of metallisa tion are to be added to the stmcture, a blanket layer of a intermetal dielectric (IMD) is deposited. The resist is deposited, patterned (mask 5), and vias down to the Al in the first metal layer are etched. Steps 10 and 11 are repeated to form the second metal layer. 

In a second embodiment, a masking layer having windows 46 is formed on a thinned wafer of p-type HgCdTe. Holes 48 are etched through the wafer in the regions inside the windows by ion etching. N-type zones 49 are developed under the windows and along the walls of the holes. The n-type zones are connected to input studs of a silicon circuit via a deposited metal layer 50. The holes may be filled with a reinforced epoxy resin to perform the same function of connection. 

By deep reactive ion etching (DRIE) of a silicon substrate channel that is 500 mm wide and 250 mm deep, serpentine-shaped long channels are fabricated with large surface areas (see Fig. 6.43). A layer of CVD oxide (1.5-2 mm thick) is first deposited and densi-fled on the Si wafer. A mask with the patterns for the flow channel and inlet/outlet ports is used to pattern a layer of photoresist. The patterns are transferred into the oxide layer using a buffered oxide etch (ammonium fluoride and hydrogen fluoride in water). The photoresist is then removed using a sulfuric acid and hydrogen peroxide mixture, and then a new layer is coated. A second mask... 

The silicon device layer is metallized with gold (500 nm Au/20 nm Cr) and patterned with the PAD METAL mask using a photolithographic lift-off process that is capable of defining 3 pm lines and spaces with a 3 pm alignment tolerance. This metal layer is exposed to high temperatures during the subsequent process steps, so it does not provide an optical quality surface for mirrors like the second metallization that is patterned with the BLANKET METAL mask. Any metal features that are defined in the first metal deposition will be in electrical contact unless they are separated by a trench etched in the device layer since the surface of the device layer is heavily doped with phosphorus. 

---