Concurrency Case statement

An important consideration in scheduling is the effect of control flow in a behavioral description. As shown in Figure 8, if-then-else and case statements imply an exclusive fork-join control block in the CDFG. Operations in the different branches of a block are mutually exclusive if they are scheduled within the control block s boundary. When similar operations in different branches are scheduled into the same c-step, a single FU is required since the operations will never execute concurrently. 

The second architecture illustrates an alternative approach that uses an If-Else statement. This sequentially evaluates each expression in the construct tmtil it finds one diat is true and then executes the associated sequence of actions. This sequential statement is similar to the conditional signal assignment in that each possible two-way branch is evaluated in series, generating a multiplexer tree. Like the Case statement, the If-Else can initiate any number of actions within each brandv unlike its concurrent equivalent. 

When a branch condition is satisfied in the architecture CASEI, one of the input signals A, B, C or D is assigned directly to Y. In the architectures of Figure 4.6, two alternative method of assigning the output are demonstrated. In CASE2, a variable, TEMP, of type BIT has been declared. A private (non-shared) variable, declared within the process declarative part, is always local to the process. The value stored in TEMP after the Case statement has been evaluated must be assigned to Y inside die process. TEMP cannot be passed out of the process or accessed by any odier concurrent statement, such as another process. If the variable was shared (Qiapter 3)... 

A Selected signal assignment statement is similar to a Case statement. The former is executed concurrently and the latter sequentially (inside a process). 

The fully synchronous process triggers on a falling-edge clock signal. If the reset signal PC is not active, the new state of S is then determined within the Case statement. The new state of S is used to update the outputs Q and QBAR in concurrent signal assignment statements that precede the process. Remember that the order of concurrent statements is irrelevant to their order of execution. 

Identical functionality does not mean identical circuits. A behavioural VHDL description that uses a Case statement can have an identical function to a description constructed from If-then statements. However, as the synthesized circuits illustrated in Chapter 4, the characteristics of the circuits generated are very different, aldiough functionally identical. Chapter 4 further illustrated that the same behaviour can be created using ei er concurrent or sequential logic constructs. The choice of statement type can have a significant impact on circuit characteristics. 

Lastly, in the case where the diffusion time z is of the same order of magnitude as the characteristic time of the chemical reaction zc, the reaction takes place concurrently with the diffusion and reaction process. It can therefore be concluded, as a general statement, that the progress time of a chemical reaction tr is given by... 

Section 4.2 has illustrated a number of different ways in which a simple multiplexer can be designed in VHDL. Not all of these approaches are recommended for such a circuit, but die nature of the example has allowed a number of concurrent and sequential language statements to be introduced, not least various Signal assignment statements and the Case and If statements. For structural style architectures, a number of different techniques that allow components to be used in a design have also been demonstrated. 

Each of the behavioural architectures consists of a process that describes a particular variant of the 4-bit shift register and an output inverter. These are two concurrent statements that will appear at the top level of the synthesized circuit. All behavioural architectures except SIMPLE employ an external initialization signal called INIT and therefore only SIMPLE has a different top-level circuit. Figure 5.13a shows the top level of SIMPLE and Figure 5.13b shows the same for all the other behavioural architectures. In each case the block represents the Process statement, the output of which is fed into an inverter. 

This example may seem a little complicated, but it clearly demonstrates how a procedure can be used in both a sequential and concurrent manner. The concurrent procedure is effectively a process. This process may contain a Clock statement (but not a Walt statement Box 7.8) or may simply be a block of combinational logic, as in this case. As with any concurrent statement variables cannot be passed to the procedure but can be used inside it, as seen here. Refer again to Box 7.9 for more details. 

The architecture contains a single concurrent call to the RC ADDER procedure. The size of the adder is defined by the size of the array types widiin the call. RCOUT and OVERFLOW contain the current sum and carry results for the adder. These values are then used by the irregular Generate statement, introduced in Chapter 5, to construct the actual adder result. Three different types of bit are produced - the sign, the radix and the ordinary bits. In each case, the logic is complicated by the overflow detection, saturation and comparison logic. The actual functions are not very important. 

Surface and interface science are critical in efforts to understand fundamental behavior and to develop new materials, processes, and products for many advanced technologies. Surface and interface properties such as reactivity (or stabihty) and catalysis in different environments, thin-fUm growth (and stability), mechanical properties, electrical properties, magnetic properties, and optical properties often need to be measured as a function of one or more processing variables. In almost aU cases, it is also necessary to determine concurrently the chemical composition of the surface or interface of interest As indicated later in this section, the two most commonly used techniques for this purpose are Auger-electron spectroscopy (AES) and X-ray photoeiectron spectroscopy (XPS). This statement is also supported by the number of publications in which these techniques were utihzed [1]. 

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