Bias-Stress Instability and Hysteresis

Bias-stress instability and hysteresis are memory effects in which the DC characteristics of a transistor at a given time depend on voltages applied to the device in the past. From the standpoint of design, these memory effects are undesirable. As we shall see later, it is difhcult but not impossible to design in a way that is tolerant of these effects. 

Generally, bias-stress instability refers to long-term changes in the transistor characteristics that do not saturate but continue without limit until the device is rendered useless. Hysteresis refers to short-term reversible shifts in the characteristics that lead to looping in the measured characteristics, depending on the direction in which the bias voltages are swept. There is no sharp distinction between bias-stress instability and hysteresis, and the two may arise from the same or similar physical causes. 

There have been few studies of either phenomenon in OTFTs [8-10]. In general, the bias-stress instability of OTFTs fabricated on inorganic gate dielectrics behaves as follows The primary effect of positive gate bias is to shift the threshold voltage to more positive voltages, and the primary effect of negative bias is to shift the 

FIGURE 6.4.6 Hysteresis leads to looping transistor characteristics, as seen in the linear-region transfer characteristics of this OTFT made using pentacene on thermal Si02. The drain current is plotted on a linear scale (left-hand vertical axis) and a logarithmic scale (right-hand vertical axis). 

The same phenomenon also manifests itself as an overshoot or undershoot in the drain current when a gate voltage step is applied. Similar effects have been observed in a-Si TFTs [13]. The details of this drain-current transient have been used to determine whether the responsible trapping states in pentacene OTFTs are electron traps or hole traps [14]. 

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When a polymer dielectric is used, there is an additional complicating factor that slow polarization of the dielectric causes an instability in a direction opposite to the bias-stress instability and the hysteresis in organic semiconductors thus, there are two competing mechanisms, with a possible crossover between them after a certain stress period [15,16]. Slow polarization in a polymer dielectric is often due to residual polar solvent in the dielectric or water absorption from the air. It is natural to characterize this type of dielectric behavior by analyzing the frequency-dependent capacitance C(f) at sufficiently low frequencies. 

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