Area-array devices and packages

chip carriers, and packages may have their I/O connections formed throughout the surface area (area arrays) as opposed to peripheral I/Os as with wire-bond pads on die or axial leads on packages. Area arrays include flip-chip, BGA, and pin-grid arrays. Area-array devices provide very high I/O counts per surface area, which are necessary for increased functionality. 

Flip-chip devices have solder bumps, other metal bumps, or even conductive adhesive bumps on the face of the device for I/O connections. During assembly, the devices are flipped face down, then mated and bonded to corresponding solder or metal pads on the package or interconnect substrate. In the quest to eliminate tin-lead solders, electrically conductive epoxy adhesives are beginning to be used for the bumps. 

PGA packages contain vertical solder-plated or gold-plated Kovar (a registered trade name of Carpenter Technology Corp.) leads on the bottom of a ceramic or plastic package (Fig. 1.11). Several rows of pins may emanate from the bottom perimeter of the package or there may be a full array of pins throughout the area. 

PGA packages have a lead pitch of 100 mils and are designed for insertion mounting in PWBs. Fig. 1.12 shows the construction of a ceramic PGA (CPGA) package whose base is a Cu-W slug that provides high heat conduction and heat dissipation from the device. 

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Area-array devices have one thing in common their solder joints are hidden by the package body and it is impossible to repair an isolated open solder joint beneath the package. Nitrogen provides added insurance that best solder wetting will result if soldering conditions and materials are process-appropriate. 

Laser is a recent innovation in rework and repair. The fundamentals of laser for initial soldering or for repair have already been discussed in Chap. 47. In the commercial incarnation of this technique, a laser beam is quickly scanned around component leads or, package surface, in the case of area-array devices such as EGAs and chip-scale packages (CSPs). It is most effective for plastic packaged components rather than the thermally massive CBGAs, CCGAs, and so on. In this technique, the component body is heated. Otherwise, there is little difference between this and alternative rework or repair techniques. 

S.K. Sitaraman, R. Raghunathan, and C.E. Hanna, Development of Virtual Reliability Methodology for Area-Array Devices used in Implantable and Automotive Applications, IEEE Transactions on Components and Packaging Technologies, Vol 23 (No. 3), Sept 2000, p 452 61... 

Due to the ever increasing I/O counts for 1C devices, packaging trends have been changing to surface mountable area array second-level interconnection, namely BGA and CSP. The driving force for these types of second-level mounting is... 

Materials with Enhanced Mechanical or Conduction Properties. In cases where the device package (leadless area array with ball grids) is incompatible with the CTE of a standard material, a low-expansion snbstrate mnst be nsed.This can be achieved in several ways. In the past, leadless surface-mount technology (SMT) focused on replacing the woven glass in standard FR-4 with woven quartz or aramid fibers. Although this reduced the expansion of the substrate, both materials were expensive and difficult to process. 

Hot air or hot gas (nitrogen) has been used to reflow, simultaneously, all solder joints of fine-pitch (high I/O count), peripheral leaded packages (e.g., QFPs) as well as those of area-array packages that include EGA component CSPs, and FC components. An example of a hot-gas nozzle apphed to a EGA package is shown in Fig. 40.31. Control of the hot-air flow maximizes heat dehvery to the solder joints and minimizes the temperatnre rise in the component body. The shroud also limits the exposure of neighboring devices and their solder joints to elevated temperatures. 

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