Chip scale package

Amagai M, Sano H, Maeda T, Imura T, Saito T (1997) Development of chip scale packages (CSP) for center pad devices. Proc Electron Compon Technol Conf 47th,pp 343-352... 

Kada M, Smith L. Advancements in stacked chip scale packaging (S-CSP), provides system-in-a-package functionality for wireless and handheld applications. Proceedings of Pan Pacific Microelectronics Symposium Conference 2000. p 1-7. 

The stacked memory, or so-called stacked chip scale package (SCSP) memory, which has been in the market for a couple of years1 -41, could be considered as... 

Figure 7.4 Intel s wire-bonded stacked Chip Scale Packaged flash memory (courtesy of Intel Corporation)141...

Intel Corporation. Intel stack Chip Scale Packaging products. Intel Flash Memory Home, [online]. Available http //www.intel.com/design/flcomp/prodbref/298051. htm. 

Bare die such as integrated circuits may be assembled in plastic or ceramic carriers, called chip-scale packages, whose dimensions are slightly larger than the chip. CSPs are often defined as packages that are no larger than 1.5 times the area of the die or no more than 1.2 times the width or length of the die. If the carrier is a BGA type, an alternate definition is that the solder-ball pitch be less than 1 mm. The pitch of... 

Figure 1.13 Construction of a flex-interposer chip-scale package mounted on a printed-circuit board.

Figure 1.16 Stacked chip-scale package configuration.

DiStefano T, Fjelstad J. Chip-scale packaging meets future design needs. Solid State... 

Koh W. Encapsulants for Chip-on-board and Chip Scale Packaging. Dexter Technical Paper Feh. 1996. 

Table 5.11 Examples of Chip-Scale Packages, SuppUeis, and Applications... 

Adhesives are used to attaeh the ehip to the earrier and the carriers to an interconnect substrate. In the past decade, there has been a proliferation of designs and configurations for CSPs, and they have become the preferred method of packaging ICs having up to 500 I/Os. One design is shown in Fig. 1.13. Chip-scale packages are classified as four general types. 

Figure 1.16. Stacked chip-scale package configuration. (Source Amkor.)...

DiStefano, T., and Fjelstad, J., Chip-Scale Packaging Meets Future Design... 

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