Wafer heating

Evaluate the convective heat flux to the surface, comparing it to an estimate of the radiation flux from the surface. Is wafer heating of cooling needed ... 

The second study was done in a cold-wall reactor12-13 using the same reactants. The reactor was a single-wafer system, similar to the tube reactor of Figure 18 in Chapter 2, with the wafer heated by an electrical resistance heater in the pedestal. In this case, the sublimator was operated at 88°C with a 10 seem flow of H2. The influence of SiH4 flow rate on the film stoichiometry and resistivity (after anneal) are shown in Figure 11. 

Since the most important industrial CVD-W reactors essentially use hot plate heating we will direct most of our attention to this type of wafer heating. 

In the case of direct wafer heating by lamp heating there is a difference in the way heat arrives at the back side of the wafer. Now the main transfer route of heat to the wafer is that by radiation which is independent of the pressure. This implies that the wafer temperature can depend much more on the process pressure since pressure affects only the heat loss from the front side of the wafer. With the hot plate heating both the incoming and the outgoing fluxes are influenced by pressure which leads partly to cancellation. In addition the determination of the wafer temperature is even more complicated than in case of hot plate heating because the wafer has to be monitored directly (thermocouple against wafer or pyrometer). 

The patterned and subsequently pyrolyzed polyimide films on silicon wafers adhered well to the substrate without cracking or peeling (Figure 2). The measured conductivity of the CPI was 10 (ohm-cm). This value is about ten times lower than that reported in reference (2) and is likely due to the relatively short test wafer heating period of 30 minutes. It is suspected that if higher temperatures or extended times during heat treatment are used, conductivity should increase by a factor of 10. 

The infegrafion of fhe sanifary hof wafer heat exchanger with the boiler heat exchanger. 

In a related manner, most of the energy of the 100-keV electrons used in SCALPEL technology is deposited into the silicon wafer, which can cause temperature rises of up to several degrees (in Celsius). This wafer heating can result in mechanical distortions that depend significantly on how the wafers are... 

Balakrishnan and Edgar (2000) evaluated gain-scheduled control of a commercial RTF reactor. They determined that a FID controller based on a semi-empirical model of the heating process provided effective temperature control of the reactor. Derivation of a fundamental heat transfer model based on an unsteady-state energy balance yielded an approximate second-order transfer function with wafer heating time constant T and heating lamp time constant << t, ). 

For some materials, the most notable being silicon, heating alone sufiBces to clean the surface. Commercial Si wafers are produced with a thin layer of silicon dioxide covering the surface. This native oxide is inert to reaction with the atmosphere, and therefore keeps the underlying Si material clean. The native oxide layer is desorbed, i.e. removed into the gas phase, by heating the wafer in UHV to a temperature above approximately 1100 °C. This procedure directly fonus a clean, well ordered Si surface. 

Extended defects range from well characterized dislocations to grain boundaries, interfaces, stacking faults, etch pits, D-defects, misfit dislocations (common in epitaxial growth), blisters induced by H or He implantation etc. Microscopic studies of such defects are very difficult, and crystal growers use years of experience and trial-and-error teclmiques to avoid or control them. Some extended defects can change in unpredictable ways upon heat treatments. Others become gettering centres for transition metals, a phenomenon which can be desirable or not, but is always difficult to control. Extended defects are sometimes cleverly used. For example, the smart-cut process relies on the controlled implantation of H followed by heat treatments to create blisters. This allows a thin layer of clean material to be lifted from a bulk wafer [261. 

Reactive Hquid infiltration (45,68,90,93,94) is similar to the CVI process used to make RBSN. Driven by capillarity, a reactive Hquid infiltrates a porous preform and reacts on free surfaces. Reactive Hquid infiltration is used to make reaction bonded siHcon carbide (RBSC), which is used in advanced heat engines and as diffusion furnace components for semiconductor wafer processing. 

PhUlips RJ (1990) Micro-channel heat sinks. In Bar-Cohen A, Kraus AD (eds) Advances in thermal modeling of electronic components and systems, vol 2, pp 109-184 Plosl A, Krauter G (1999) Wafer direct bonding tailoring adhesion between brittle materials. Mater Sci Eng R25 92-98... 

Fig. 4.5a-c Rectangular micro-channels, (a) 4i = 133—367 pm. Test section used by Peng and Peterson (1996) (schematic view) 1 electrical contact, 2 heated stainless steel block, 5 micro-channel, 4 cover plate, (b) <4 = 404—1,923 pm. Test section used by Harms et al. (1999) (schematic view) 1 silicon wafer, 2 micro-channel, 3 heater, 4 cover plate, (c) dh = 348 pm. Test section used by Qu and Mudawar (2002a) (schematic view) 1 copper block, 2 micro-channel, 3 heater, 4 cover plate. Reprinted from Peng and Peterson (1996), Harms et al. (1999), Warrier et al. (2002), Qu and Mudawar (2002a), Gao et al. (2002), and Lee et al. (2005) with permission... 

The numerical and experimental study of Tiselj et al. (2004) (see Fig. 4.17) was focused on the effect of axial heat conduction through silicon wafers on heat transfer in the range of Re = 3.2—84. Figure4.17 shows their calculation model of a triangular micro-channels heat sink. The results of calculations are presented in Fig. 4.18. 

Fig. 4.17 Calculation model of triangular micro-channels heat sink 1 cover plate, 2 micro-channel, 3 silicon wafer, 4 heater. Reprinted from Tiselj et al. (2004) with permission...

The stepwise heating/cooling cycle was conducted on the Ti02 wafer (8H rutile after being heat treated in O2) and a typical correlation of 0/Ti ratio versus temperature is shown in Figure 6 for one particular run. Surface reduction is facilitated by ESD, and additional cycles continually reduced both maximum 0/Ti ratio obtained at high temperature and the minimum 0/Tl ratio observed at room temperature, and a final value of 0.7 was measured at the com-... 

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