Through silicon vias

TSVs are an important component of all four wafer-level 3D technology platforms discussed above. In the via-lirst approaches, the I/O connections from the bond layer to the top of the stack are accomplished by TSVs, and in the via-last approach, these interconnects as well as the interwafer interconnects are defined by TSVs. In general, to accomplish high-performance high-density interconnection, TSVs should be as short and small as possible. 

Two challenges are uniform thinning of the top wafer and high aspect ratio etching of the thinned layer. An approach to high-density TSV interconnection using a variety of CMOS-compatible fabrication steps (such as CVD tungsten and polysilicon, BCD copper, and solder micro-bumps) is presented by Knickerbocker et al. in References 86 and 87. 

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Spiesshoefer S, Schaper L. IC stacking technology using fine pitch, nanoscale through silicon vias,in Proceedings of the IEEE Electronic Components and Technology Conference 2003 p 631-633. 

Reche J. Tru-Si Technologies lEEE/CPMT Meeting, Santa Clara. CA May 10, 2000. Humpston G. Setting a new standard for through-silicon via reliability. Electronic Design. Oct. 22, 2009. 

The through-silicon via (TSV) technology is currently used for various device types especially for advanced 3D packaging. Implementation of TSV process in the IC wafer fab is a fabrication methodology being developed to achieve 3D-IC... 

Zellner P, Rcmaghan L, Hasnain Z, Agah M (2010) Fabrication and electrical characttaization of high aspect ratio poly-silicon filled through-silicon vias. J Micromech Microeng 20 045013... 

Defforge T, Coudron L, Menard O, Grimal V, Gautier G, Tran-Van F (2013) Copper electrodeposition into macroporous silicon arrays for through silicon via applications. Microelectron Eng 106 160-163... 

CVD processing can be used to provide selective deposition on certain areas of a surface. Selective tungsten CVD is used to fill vias or holes selectively through silicon oxide layers in silicon-device technology. In this case, the silicon from the substrate catalyzes the reduction of tungsten hexafluoride, whereas the silicon oxide does not. Selective CVD deposition can also be accomplished using lasers or focused electron beams for local heating. 

Figure 8.3 By exposing porous silicon via a channel through mono-silicon to an WF6 ambient, buried tungsten islands can be formed underneath mono-silicon.

In TSV, vertical micro through holes (vias) are chemically etched, mechanically drilled or laser drilled in the silicon die at the wafer level, then made electrically conductive by plating or vapor depositing metal conductors. The sidewalls of the vias, however, must first be insulated from the silicon. A dielectric film overlaid with conductive metal may be applied to the sidewalls or the exposed silicon may first be oxidized to isolate it from subsequent metallization. Connections within the chips are generally made between bond pads on one face of the die to a land on the opposite side. 

In view of the above discussion, it should be apparent that the localization within the cell of small molecules such as citric-acid-cycle anions is a major problem. There have been two approaches used to determine levels of key intermediates in the cytosol and mitochondria of mammalian cells one is indirect, involving the measurement of whole-cell levels of intermediates, followed by partitioning as judged by a set of calculation the second involves the rapid lysis of isolated cells, followed by their separation via centrifugation through silicone oil. The following is a brief critique of both of these procedures. 

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