Silicon fabrication procedure, schematic

Figure 8.5 Schematic illustration of fabrication procedure for silicon nitride with controlled grain orientation through seeding and tape casting. Reprinted with permission from Ref [19] ...

Isothermal Infiltration. Several infiltration procedures have been developed, which are shown schematically in Fig. 5.15.P3] In isothermal infiltration (5.15a), the gases surround the porous substrate and enter by diffusion. The concentration of reactants is higher toward the outside of the porous substrate, and deposition occurs preferentially in the outer portions forming a skin which impedes further infiltration. It is often necessary to interrupt the process and remove the skin by machining so that the interior of the substrate may be densified. In spite of this limitation, isothermal infiltration is used widely because it lends itself well to simultaneous processing of a great number of parts in large furnaces. It is used for the fabrication of carbon-carbon composites for aircraft brakes and silicon carbide composites for aerospace applications (see Ch. 19). 

A cross-sectional schematic of a monolithic gas sensor system featuring a microhotplate is shown in Fig. 2.2. Its fabrication relies on an industrial CMOS-process with subsequent micromachining steps. Diverse thin-film layers, which can be used for electrical insulation and passivation, are available in the CMOS-process. They are denoted dielectric layers and include several silicon-oxide layers such as the thermal field oxide, the contact oxide and the intermetal oxide as well as a silicon-nitride layer that serves as passivation. All these materials exhibit a characteristically low thermal conductivity, so that a membrane, which consists of only the dielectric layers, provides excellent thermal insulation between the bulk-silicon chip and a heated area. The heated area features a resistive heater, a temperature sensor, and the electrodes that contact the deposited sensitive metal oxide. An additional temperature sensor is integrated close to the circuitry on the bulk chip to monitor the overall chip temperature. The membrane is released by etching away the silicon underneath the dielectric layers. Depending on the micromachining procedure, it is possible to leave a silicon island underneath the heated area. Such an island can serve as a heat spreader and also mechanically stabihzes the membrane. The fabrication process will be explained in more detail in Chap 4. 

Figure 18 Schematic depiction of the procedure for the fabrication of asymmetric nanoporous membranes, (a) A thin film of a mixture of PS-/>-PMMA (with cylindrical microdomains of PMMA) and PMMA homopolymer on a 100 nm fhick sacrificial silicon oxide layer, (b) The film is fransferred onto the microfiltration polysulfone membrane, (c) Porous thin films of the upper layer is prepared by selectively removing the PMMA homopolymer from the cylindrical PMMA microdomains with acetic acid, (d) HRV14 virus (colored green) is completely prevented from penetrating into the pores, while proteins, such as bovine serum albumin (colored yellow) passes freely through the pores in the membrane. Reproduced with permission from Yang, S. Y. Ryu, I. Kim, H. Y. etal. Adv. Mater. 2006, 18.

A schematic diagram of the procedure for fabricating the BDD-MDA electrode is shown in Fig. 11.1. A Si(lOO) surface was masked with patterned photoresist and etched with a mixture of HF, HNO3 and H2O. The structured silicon surface was seeded with 10-nm diamond powder. BDD was deposited using a microwave plasma-assisted chemical vapor deposition system. The details of the diamond deposition have been reported elsewhere [7]. After the deposition of diamond, polyimide varnish was spin-coated on the diamond surface. The polyimide layer was... 

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