Pin grid array package

Figure 6. Cofired ceramic pin grid array package with 270 pins and a tape-automated-bonded 1C.

Tan N, Chin B, Lim KHK, Bourdillon AJ. Engineering surfaces in ceramic pin grid array packaging to inhibit epoxy bleeding. Hewlett Packard J. Aug. 1998. 

FIGURE 34.9 A ceramic pin-grid-array package (96% pure AijOs with multilayer Au metallization. 

Tan, N., Lim, K., Chin, B., and Bourdillon, A., Engineering Surfaces in Ceramic Pin Grid Array Packaging to Inhibit Epoxy Bleeding, Hewlett-Packard J. (Aug.1998)... 

N Iwase, T Yanazawa, M Nakahashi, K Shinozaki, A Tsuge. Aluminum nitride multi-layer pin grid array packages. 37th Electronic Components Conference, IEEE CHMT, 384-391 (1987). 

Older CPUs are generally square, with transistors arranged in a Pin Grid Array (PGA). Prior to 1981, chips were found in a rectangle with two rows of 20 pins known as a Dual Inline Package (DIP). See Figure 2.20. There are still integrated circuits that use the DIP form factor. However, the DIP form factor isn t used for PC CPUs anymore. Most CPUs use either the PGA or the SECC form factor (discussed earlier). 

PGA (Pin Grid Array) A type of IC package that consists of a grid of pins connected to a square, flat package. 

Figure 4 shows an example of a pin grid array (PGA), developed to accommodate IC s with 84 or more pins. The original PGA s were ceramic packages, but several techniques are now used to produce them in plastic. The PGA s can be through-hole mounted on the printed wiring board, or can be socketed and surface mounted. 

ICs, chip carriers, and packages may have their I/O connections formed throughout the surface area (area arrays) as opposed to peripheral I/Os as with wire-bond pads on die or axial leads on packages. Area arrays include flip-chip, BGA, and pin-grid arrays. Area-array devices provide very high I/O counts per surface area, which are necessary for increased functionality. 

Land grid array (LGA), an Intel package used for parts such as the 80386L microprocessor. The package is similar to a PGA except that it has gold-plated pads (called landing pads) vs. pins. Leadless inverted device (LID), a shaped metallized ceramic form used as an intermediate carrier for the semiconductor chip (die). It is especially adapted for attachment to conductor lands of a thick-film or thin-film network by reflow solder bonding. 

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