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Multilevel interconnections, insulating

The most effective use of PIQ in semiconductors is as an insulating layer for multilevel interconnections. After the first metallization is formed, a PIQ prepolymer solution is spin coated on the wafer and then thermally cured. [Pg.136]

The increasing importance of multilevel interconnection systems and surface passivation in integrated circuit fabrication has stimulated interest in polyimide films for application in silicon device processing both as multilevel insulators and overcoat layers. The ability of polyimide films to planarize stepped device geometries, as well as their thermal and chemical inertness have been previously reported, as have various physical and electrical parameters related to circuit stability and reliability in use (1, 3). This paper focuses on three aspects of the electrical conductivity of polyimide (PI) films prepared from Hitachi and DuPont resins, indicating implications of each conductivity component for device reliability. The three forms of polyimide conductivity considered here are bulk electronic ionic, associated with intentional sodium contamination and surface or interface conductance. [Pg.151]

As the size of microchips evolves from 130nm to 90nm or smaller, the increasing packing density between multilevel interconnects will lead to severe RC delay, power consumption and wire cross talk, which are the major factors limiting device performance. As a consequence, the design of novel semiconductor materials with desired chemical and physical properties has stimulated intense experimental and theoretical efforts. For example, there have been ongoing activities to develop materials with low dielectric constants (k) to replace the current silicon dioxide (k = 4.0) wire insulator. A particularly active area of research in the past few... [Pg.533]

Polyimide films are extensively used in the microelectronic industry as insulators for multilevel interconnect systems because of their excellent thermal and electrical properties. In some cases,... [Pg.196]

Wilson, A. M., "Polyimide Insulators for Multilevel Interconnections", Thin Solid Films, SI, 145-163 (1981). [Pg.435]

With the increase of the degree of integration of microcircuits, the multilevel interconnect technology becomes inevitable for future VLSI manufacture. Polyimide exhibits superior planarity over stepped structures and is expected to be one of the most promising materials for the dielectric insulation of VLSI s. However, since the smallest via holes so far achieved by wet etching is 3 pm (1), the formation of fine via holes by a dry etch process is needed for the application of polyimide to VLSI having fine metal wiring. [Pg.547]

The ILD CMP process has been used to polish plasma-enhanced tetraethylortho-silicate (PETEOS) or high-density plasma chemical vapor deposition (HDPCVD) film on deposited silicon wafer. Figure 15.2 shows the ILD CMP process. The stacking of additional layers on top of one another produces a more and more rugged topography. Between each layer, the dielectric is deposited as an insulating material. To obtain a multilevel interconnection, the surface of the wafer must be... [Pg.178]

Silica is a material with a low dielectric constant of k—4.0. In order to increase the packing density between multilevel interconnects, new. ultralow-k materials are needed. Because k decreases with decreasing density, crystalline and noncrystalline porous silicas with DK as low as A <2.0 were introduced to replace the current wire insulators in microelectronics for multilayer deviees. Because of their low density, ordered mesoporous materials are used for practical purposes. ... [Pg.385]


See other pages where Multilevel interconnections, insulating is mentioned: [Pg.442]    [Pg.123]    [Pg.139]    [Pg.442]    [Pg.442]    [Pg.233]    [Pg.349]    [Pg.288]    [Pg.10]    [Pg.331]    [Pg.413]    [Pg.104]    [Pg.4]    [Pg.105]   


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Interconnect

Interconnected

Interconnections

Interconnects

Multilevel

Multilevel interconnections, insulating layer

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