Local oxidation of silicon

Kooi, E., Vanlierop, J. G. and Appels, J. A. Formation of silicon-nitride at a Si-Si02 interface during local oxidation of silicon and during heat-treatment of oxidized silicon in NH3 gas. Journal of the Electrochemical Society 123, 1117-1120 (1976). 

These processes are considerably more complex in actual CMOS fabrication. First, the lower layers of a CMOS structure typically have a twin-tub design which includes both PMOS and NMOS devices adjacent to each other (see Fig. 3b). After step 1, a mask is opened such that a wide area is implanted to form the -well, followed by a similar procedure to create they>-well. Isolation between active areas is commonly provided by local oxidation of silicon (LOCOS), which creates a thick field oxide. A narrow strip of lightly doped drain (LDD) is formed under the edges of the gate to prevent hot-carrier induced instabilities. Passivation sidewalls are used as etch resists. A complete sequence of fabrication from wafer to packaged unit is shown in Figure 10. 

Before discussing shallow trench isolation, a brief summary should be made about its predecessor—the local oxidation of silicon [7]—as an illustration of... 

Appels JA, Kooi E, Paffen MM, Schatorje JJH, Verkuylen WHCG. Local oxidation of silicon and its application in semiconductor-device technology. Phil Res Rep 1970 25 118-132. 

FIGURE 13.1 Illustrations of the various processing steps for local oxidation of silicon and shallow trench isolation (from Ref. 7). 

P. Avouris, T. Hertel, R. Martel, AFM tip-induced local oxidation of silicon Kinetics, mechanism, and nanofabrication. Appl. Phys. Lett. 71, 285-287, 1997. 

Shallow trench isolation (STI) is a relatively new technique that is replacing local oxidation of silicon (LOCOS) for the manufacture of 64 MB semiconductor devices with a linewidth below 0.25 pm. Figure 3.1 shows the... 

Si3N4 layers deposited by CVD are important in the fabrication of certain semiconductor devices. One area is in the so-called LOCOS (local oxidation of silicon) process. This method is used in both bipolar and metal oxide semiconductor (MOS) devices to isolate active device regions. The process works as follows A layer of Si3N4 is deposited on the silicon wafer by CVD either by reacting silane and ammonia at temperatures between 700 and 900°C... 

The abbreviation LOCOS stands for local oxidation of silicon, in which selective areas on a wafer... 

To manufacture an oxide layer for a SOI structure, either the local oxidation of silicon (LOCOS) process or the separation by implanted oxygen (SIMOX)... 

The abbreviation LOCOS stands for local oxidation of silicon, in which selective areas on a wafer are oxidized for electrical insulation purposes in semiconductor technology. This process is used for isolating two adjacent devices with a feature size of greater than 0.25 pm. 

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