Floating point speed

A simulation is almost always cpu bound. Hence, fast floating point speed is essential. 

As we have seen on the CRAY the ability to gather data together is essential. Memory speed must be commensurate with floating point speed. When nearest neighbor tables are used fast scatter operations are also needed. The two essential random memory operations needed are ... 

A common acronym is MFLOPS, millions of floating-point operations per second. Because most scientific computations are limited by the speed at which floating point operations can be performed, this is a common measure of peak computing speed. Supercomputers of 1991 offered peak speeds of 1000 MFLOPS (1 GFLOP) and higher. 

Finally, most doubly or triply subscripted array operations can execute as a single vector instruction on the ASC. To demonstrate the hardware capabilities of the ASC,the vector dot product matrix multiplication instruction, which utilizes one of the most powerful pieces of hardware on the ASC, is compared to similar code on an IBM 360/91 and the CDC 7600 and Cyber 174. Table IV lists the Fortran pattern, which is recognized by the ASC compiler and collapsed into a single vector dot product instruction, the basic instructions required and the hardware speeds obtained when executing the same matrix operations on all four machines. Since many vector instructions in a CP pipe produce one result every clock cycle (80 nanoseconds), ordinary vector multiplications and additions (together) execute at the rate of 24 million floating point operations per second (MFLOPS). For the vector dot product instruction however, each output value produced represents a multiplication and an addition. Thus, vector dot product on the ASC attains a speed of 48 million floating point operations per second. 

Peripheral processors which are capable of performing floating point arithmetic operations at high speed are used to enhance the poor performance of popular general purpose minicomputers in this area. These devices are described in various ways but the following nomenclature will be used in this paper. 

Either of the remaining two options to be discussed would provide at least an order of magnitude increase in speed on the Am9511A and are much coveted by the author, but unfortunately they would require financial resources on a very large scale for development into useable floating point arithmetic processors. 

Also called the 387. A floating-point processor from Intel, 80387 was designed for use with the 80386 CPU chip. When supported by application programs, a floating-point processor can speed up floating-point and transcendental... 

Hardware floating-point processor Performs with very high speed floating-point arithmetic operations and expands tremendously the computational speed of the machine. 

Burks, Goldstine, and von Neumann first identified the principal components of the general-purpose computer as the arithmetic, memory, control, and input-output organs, and then proceeded to formulate the structure and essential characteristics of each unit for the IAS machine. Alternatives were considered and the rationale behind the choice selected presented. Adoption of the binary, rather than decimal, number system was justified by its simplicity and speed in elementary arithmetic operations, its applicability to logical instructions, and the inherent binary nature of electronie components. Built-in floating-point hardware was ruled out, for the prototype at least, as a waste of the critical memory resource, and because of the increased complexity of the circuitry consideration was given to software implementation of such a facility. 

A typical desktop computer can handle 100 million instructions per second. As of June, 2010, the fastest supercomputer was the Cray Jaguar at Oak Ridge National Laboratory. Its top speed is 1.75 petaflops (1 quadrillion floating point operations) per second. 

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