Avoiding Flip-flops

It is important to understand the flip-flop inference rules of a synthesis tool. These rules may vary from one synthesis tool to another. If the inference rules are not followed, a synthesized netlist may have many more flip-flops than are really necessary. Here is a case in point. 

Here the intention appears to be to store the value of PresentState in a flip-flop (rising-edge-triggered). After synthesis, not only is there a flip-flop for PresentState, there are also four flip-flops for Zout. This is because Zout is assigned under the control of a clock. It may or may not be the intention to generate flip-flops for Zout. If not, then a case statement needs to be written in a separate always statement in which Zout is assigned, this 

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Technical term for properties of electrical or neural circuits (flip-flop switch) to rest in two distinct states while avoiding intermediate states (e.g., behavioral state sleep-wake transitions). 

The synthesized netlist is the same as in Figure 2-48. Notice that on every clock edge, NextState always get the value of Temp assigned in the previous clock cycle, but not so in the synthesized netlist. The recommendation here is to avoid using locally declared variables in this fashion. Hopefully a synthesis tool will issue a warning if no flip-flops are inferred for Temp. 

Two flip-flops are inferred to hold the value of the variable MealyState with the specified state assignment. The default branch in the case statement can be avoided by specifying the case statement as full case , as shown next. 

Recommendation Avoid asynchronously reading a variable and assigning it to a flip-flop else ensure that there are no changes on asynchronous data when the asynchronous conditions are active. 

Separate negative and positive edge flip-flops into separate hierarchical blocks. In other words, avoid having both kinds of flops in the same hierarchical module. This makes the debug process and timing analysis during synthesis much simpler. Moreover, this can help simplify test insertion. 

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