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Three-dimensional transistor

For example, Intel, the largest manufecturer of microprocessors, is a sponsor of various University of Gahfomia electrical engineering departments and in 2011 announced their new three-dimensional transistor. The technology is based on original research first described by the University of Galifornia, Berkeley, in 2000 and funded by DARPA. [Pg.574]

D X-ray fluorescence analysis, 20 439-440 Three-dimensional (3D) transistor structures, in scaling to deep submicron dimensions, 22 256 Three-dimensional carbon-carbon composites, 26 774... [Pg.948]

In any real memory device the capacitors take up most of the chip area the transistors and resistors are very small. Therefore the FRAM roadmap [8] shown in Table 2 mandates a fully three-dimensional (3D) capacitor structure in the industry by 2008. The state of the art at present is a PZT-lined trench, a Tokyo Institute of Technology-Samsung collaboration that achieves a 6.5 1 aspect ratio for the trenches. Ru electrodes are used, prepared from the organic precursor Ru-DER, from Tosoh Corp. [Pg.203]

Figure 10. Top, three-dimensional view of an oxide-isolated bipolar transistor. (Reproduced with permission from reference 13. Copyright 1988 McGraw-Hill.) Bottom, schematic of a common base n-p-n transistor circuit. Abbreviations are defined as follows n-epi, n-type-doped epitaxial-grown silicon and p-CHAN-STOPy p-type channel stop. Figure 10. Top, three-dimensional view of an oxide-isolated bipolar transistor. (Reproduced with permission from reference 13. Copyright 1988 McGraw-Hill.) Bottom, schematic of a common base n-p-n transistor circuit. Abbreviations are defined as follows n-epi, n-type-doped epitaxial-grown silicon and p-CHAN-STOPy p-type channel stop.
MOSFETs. The metal-oxide-semiconductor field effect transistor (MOSFET or MOS transistor) (8) is the most important device for very-large-scale integrated circuits, and it is used extensively in memories and microprocessors. MOSFETs consume little power and can be scaled down readily. The process technology for MOSFETs is typically less complex than that for bipolar devices. Figure 12 shows a three-dimensional view of an n-channel MOS (NMOS) transistor and a schematic cross section. The device can be viewed as two p-n junctions separated by a MOS capacitor that consists of a p-type semiconductor with an oxide film and a metal film on top of the oxide. [Pg.35]

In this chapter, we intend to revise the most recent contributions to the aforementioned aspects of Pc research. We will describe how the versatile chemistry of Pcs makes possible the preparation of monofunctionalized macrocycles, mainly aimed at preparing multicomponent systems through reaction with other electroactive moieties. The controlled organization of Pcs in solution and the incorporation of these chromophores into macromolecular structures, as well as the preparation of mono-, bi-, and three-dimensional nanostructures, will be the object of study. Finally, some examples of Pc-based devices (solar cells, sensors, transistors, etc.) will also be given as an example of the real applicability of these molecules. [Pg.3]

Cross-sectional view of a three-dimensional map of dopant atoms (light blue spheres) implanted into a typical silicon transistor structure. Red dots represent the silicon atoms (only 2% are shown for clarity) and the gray spheres represent a native silicon dioxide layer located at the interface between the crystalline silicon substrate and layer of deposited polycrystalline silicon. [Pg.862]

FIGURE 2.2.2 Three-dimensional view of an organic thin-film transistor. [Pg.76]

Fulfilling multilayer and miniature structures of memory devices led to the introduction of new materials and sfrucfures. For the structure, the design rule decreases less than 70 nm and the short channel effect (SCE) phenomenon appears to have a bad influence on fhe device drive if exisf-ing planar transistor (TR) is applied. To solve this problem, studies are in progress to apply recessed charmel array TR and three-dimensional structured FinFET in DRAM and floating gate, twin SONOS, and FinFET SONOS in flash memory (Eigure 6.3). [Pg.151]

DAP Three-dimensional atom probe transistor... [Pg.926]


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See also in sourсe #XX -- [ Pg.574 ]




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