Porous layers, membrane wafer

Another way to use silicon wafers as DLs was presented by Meyers and Maynard [77]. They developed a micro-PEMFC based on a bilayer design in which both the anode and the cathode current collectors were made out of conductive silicon wafers. Each of fhese componenfs had a series of microchannels formed on one of their surfaces, allowing fhe hydrogen and oxygen to flow through them. Before the charmels were machined, a layer of porous silicon was formed on top of the Si wafers and fhen fhe silicon material beneath the porous layer was electropolished away to form fhe channels. After the wafers were machined, the CEs were added to the surfaces. In this cell, the actual diffusion layers were the porous silicon layers located on top of the channels because they let the gases diffuse fhrough fhem toward the active sites near the membrane. 

Whereas layer-by-layer deposition into porous hard templates has been proven to be a promising access to precisely designed polymeric nanotubes that can fimctionaUze hard templates or that can be released, two problems still need to be addressed. The first one is elucidating the structure formation of the polyelectrolyte layers inside hard templates. The significantly increased thickness of bilayers reported by Ai et aL [236] was also observed by other authors. Lee et al. found that the thickness of poly(allylamine hydrochloride)/poly(sodium-4-styrenesulfonate) multilayers deposited into porous PC membranes exceeded that of corresponding multilayers on smooth substrates obtained after the same number of deposition cycles. For example, 24.5 bilayers had a thickness of 250 run within a hard template as compared to 155 run on a smooth silicon wafer [252]. Alem et aL studied the layer-by-layer deposition of a pair of strong polyelectrolytes, namely... 

Zhang, Advani, and Prasad [51,52] also used microfabrication techniques in order to develop a thin, perforated copper foil and use it as a cathode DL in a PEMLC. In addition to the metal DL, an "enhancement" layer was used that consisted of a porous material locafed befween the perforated copper foil and fhe LF plate (CLP was used in fhis study). This layer improved the overall short-term performance and wafer managemenf of fhe cell. Flowever, the authors did not discuss any possible long-term issues related to contaminahon of the membrane due to the use of a copper DL. 

A number of novel applications of zeolites depend on the ability to create thin, adhesive films on various substrates. While zeolite films or layers are commonly prepared on dense substrates such as silicon wafers, zeolite membranes are made on porous supports in order to permit permeation through the zeolite layer. Numerous synthetic studies have addressed the goal of obtaining adhesive layers of zeolites on various substrates such as noble and nonnoble metals, glass, ceramics, silicon, and even biological substrates such as cellulose fibers. For a more detailed discussion of zeolite membranes the reader is referred to the article by Julbe in this book. Pertinent reviews to this subject are given in the following references.[57,58]... 

A two-step membrane manufacturing process has been reported where a defect free Pd-alloy membrane is first prepared by sputtering deposition onto the perfect surface of a silicon wafer, for example. In a second step the membrane is removed from the wafer and transferred to a porous stainless steel support (see Figure 11.1). This allows the preparation of very thin ( 1-2 pm) defect-free membranes supported on macroporous substrates (pore size equals 2 pm). By this technique, the ratio of the membrane thickness over the pore size of the support may become less than 1, which is two orders of magnitude smaller than obtained by more conventional membrane preparation techniques. Tubular-supported palladium membranes prepared by the two-step method show a H2/N2 permselectivity equal to 2600 at 26 bars and hydrogen flux of 2477 mL(STP) min cm . Since the method enables the combination of macro-porous stainless steel supports and thin membrane layers, the support resistance is negligible. ... 

Hayase et al. (2011) describe a nfini-fuel cell with monolithically fabricated electrodes. A porous Pt layer on an Si substrate was formed by immersing porous Si into a Pt plating bath containing HF. After formation of the porous catalyst layer, fuel channels were opened by applying dry etching from the opposite side of the Si wafer. Two such Si electrodes were hot-pressed on either side of a polymer electrolyte membrane. By feeding H2 and O2 to the corresponding electrodes, a peak power density of 145 mW/cm was obtained. 

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