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Packaging wafer-level packaged semiconductor

R. Islam, C. Rrubaker, P. Lindner, C. Schaefer. Wafer level packaging and 3-D interconnect for IC technology. In Proc. IEEE/SEMI Advanced Semiconductor Manufacturing Conf., 2002, pp. 212-217. [Pg.20]

Polyimides have been widely used in the advanced microelectronics industry such as passivation or stress-relief layers for high-density electronic packaging, interlayer dielectric layers for wafer-level semiconductor fabrication, or alignment layers for liquid crystals in advanced liquid crystal display devices (LCDs) owing to their outstanding thermal, mechanical and good insulation properties with low dielectric constant, good adhesion to common substrates and superior chemical... [Pg.80]

Wafer bonding is a technology to combine two substrates in order to achieve a mechanically stable connection between them. The technology is apphed for substrate production, for example, for the fabrication of silicon on insulator wafers or compound semiconductor wafers and for device fabrication, for example, for the fabrication of MEMS/MOEMS devices as described in previous sections, for stacking devices in 3D integration, or for wafer-level packaging. [Pg.481]


See other pages where Packaging wafer-level packaged semiconductor is mentioned: [Pg.81]    [Pg.243]    [Pg.30]    [Pg.29]    [Pg.429]    [Pg.228]    [Pg.921]   


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