IsSpice model

The parameters that will be measured in each of the software packages and the hardware are the minimum and maximum voltages, the rise and fall time of the output, and the effective pulse width. The response of the IsSpice model is shown as Fig. 3.32. Micro-Cap results are shown as Fig. 3.33. PSpice results are displayed in Fig. 3.34, and the hardware measurements are shown as Fig. 3.35. 

For each filter, an AC analysis was run for comparison between the different software packages. These results are displayed along with the step response from each of the filters. The results of the IsSpice model are displayed in Figs. 3.38 and 3.39. The PSpice results are shown in Figs. 3.40 and 3.41. The results from the Micro-Cap model are shown in Figs. 3.42 and 3.43. 

Output impedance was measured on both the breadboard and the IsSpice models. To simulate the output impedance, voltage source V4 was changed to AC 1 and the current source on the output was changed to AC 1. The breadboard measurements are shown in Fig. 4.78, while the IsSpice results are shown in Fig. 4.79. 

The three simulators have slightly different switch models. The IsSpice model used is the PSW1 switch. This is different from the built-in switch model, which is basically the Berkeley SPICE switch model with hysteresis. The parameters passed are VON = 7 V, RON = 100 Q, VOFF = 2 V, and ROFF = 100 . The PSpice simulation used a model called Sbreak. Like the PSW1 and the Micro-Cap switch models, this switch transitions smoothly between the on and off states and has no hysteresis. 

The Microsemi data sheet of the 1N4733A shows a nominal zener voltage of 5.1 V at a test current of 49 mA. The IsSpice model shows 5.101 V at 49 mA, while the Micro-Cap model shows 5.819 V at a current of 42 mA. With results such as these, the logical question is, are the models correct ... 

The IsSpice model shows that the ramp voltage peaks at 3.7 V and has a minimum of 1.75 V. The maximum is below the extreme high specification of 4 V, and the minimum is above the extreme minimum specification of 1.4 V. This seems to line up pretty close to the data sheet, but the model s hysteresis voltage is 1.95 V, and the specified maximum is only 1.6 V. The IsSpice version of the Schmitt trigger would work for some applications where the hysteresis voltage is not so critical, but for this application, the large hysteresis value caused a much lower frequency then expected. The IsSpice model s frequency is 5.29 kHz. 

The input pulse and the output DC voltage were measured using an oscilloscope. The result picture is shown in Fig. 10.3a. Unfortunately, the ripple on the breadboard was small enough to be swamped by the noise in the lab, and we were not able to make an accurate measurement. The IsSpice model result is shown in Fig. 10.3b. The top waveform is the output voltage and the bottom waveform is the input pulse. 

A simple curve tracer circuit was created in each of the simulators. The IsSpice circuit is shown in Fig. 10.18. The diode on the left is the IsSpice model the one on the right is the model Kielkowski created... 

In Fig. 10.19, the traces, from top to bottom, are Ron Kielkowski s model, the Micro-Cap model, the IsSpice model, the measured data from a 1N4002 from the quadrupler circuit, and the PSpice model. The measured data is the dotted line. All of the diode data is similar. The differences from the breadboard diode, as explained above, are largely due to manufacturing tolerances, different manufacturers, and lot-to-lot variations. Ron Kielkowski s model was taken from the data for an actual 1N4002 diode as well. Figure 10.19 is a good example of how differences in models do not indicate their correctness. It is easy to construct a SPICE-compatible diode model that will exactly trace the curve of the breadboard 1N4002 however it would still be valid only for the exact breadboard modeled with that diode. 

IsSpice had an LM124 model in its library. The simulation response to a step input is shown in Fig. 3.25, and the AC simulation results are shown in Fig. 3.26. 

Figure 3.72 IsSpice results of nonlinear model for inrush current simulation.

Figure 3.74 IsSpice attenuation results (nonlinear model).

Note the saturating core model is available in both PSpice and IsSpice. In PSpice the core is available as part of the AEi Systems Power IC Model Library for PSpice. This figure is shown to give a visual representation of the effects of an EMI filter. 

SPICE tip SPICE models for the LM78S40 were not provided in the Micro-Cap software package. This circuit was simulated using IsSpice and PSpice only. 

File name Simulation Type of model SIMetrix run time (s) IsSpice run time (s)... 

The SG1524 model was simulated in IsSpice and SIMetrix, RELTOL = 0.01, TMAX 50n... 

The modulation gain of the test circuit was also measured. The modulation gain is the gain from the output of the opto-coupler to the output of the STR-F6524 average mode model. The breadboard results are shown in Fig. 4.76, and the IsSpice results are shown in Fig. 4.77. 

The lab diode used the Fig. 6.39 configuration, and zener current versus zener voltage was plotted. The graph in Fig. 6.40 shows the curves for the Micro-Cap 1N4733, IsSpice 1N4733, and 1N4733A models designed by AEi Systems. 

Although all three simulators correctly predicted the frequency and amplitude of the sine wave, only the IsSpice simulation predicted the DC offset in the output waveform. The reason for this is the simulations for each used the LM124 model that came with the simulation... 

The model of the 74HC04 was taken from IsSpice because the version of PSpice did not offer an analog version of the 74HC04. 

Consider the CD4093B model contained in the IsSpice package. The circuit is shown in Fig. 8.57. The results are displayed in Fig. 8.58. 

While attempting to run this simulation in Micro-Cap, the following error was generated Floating point Pow (0,-1.1376) Domain Error. This was traced to the use of the SPICE-compatible VALUE statement in an E element. The value statement is used to model equations dependent on other nodes or currents. The statement in question used the form X" - Y. This was acceptable to IsSpice and PSpice, but not to Micro-Cap. This statement was rewritten in the equivalent form 1 / (X Y), which was accepted without error. 

Examining Fig. 10.17, it is interesting to note the Micro-Cap and IsSpice results are very similar, the PSpice results are slightly higher, and the breadboard data falls in between the simulations. Suspecting the culprit to be the diode models, these were examined more closely. 

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