SPICE models

In this part we will demonstrate how to modify existing PSpice models and how to create new models. We will assume that the user is familiar with PSpice models and knows how he or she would like to modify the models. A discussion of the various models requires too much detail to be given here. The user is referred to the PSpice Reference Manual available from Oread Corporation for model details. This manual is contained on the CD-ROM that accompanies this text. You will probably need to review the many references that Oread gives to understand the model parameters. Here, we will show how to make changes to existing models or create simple new models. Section 7.E contains simplified models for some of the commonly used parts. The model parameters given are for firsttime users. For more accurate models, you will need to refer to more detailed texts covering SPICE models. If you are more familiar with the models, you can use these procedures to modify all parameters in a model. 

Scroll down the window until you see the SPICE Models link ... 

This book is a compilation of all various types of electronic circuits. Such compilations are not unusual in fact, there are several excellent circuit encyclopedias on bookshelves. However, this book goes several steps further. Instead of simply presenting the circuit to the reader, it also provides a SPICE schematic and details about the equivalent hardware performance. The intricacies involved in developing an accurate SPICE model of the circuit are also included. This format benefits readers in numerous ways. First, it allows them to emulate the correlation techniques introduced in this book in order to make their own SPICE models accurately mimic the behavior of the hardware. Secondly, it allows them to clearly see where SPICE excels in its ability to represent real hardware performance. 

The inrush current of an EMI filter is usually examined to ensure that no parts are overstressed during power-up. If the inductor does not saturate, the inrush current is described by Faraday s law and can easily be modeled by mathematics or a simple SPICE model. It is also not too difficult to determine if a core is saturated during turn-on. A slightly more difficult calculation is to determine what the maximum current will be under a given turn-on condition. The hardware used for measurements used a transformer made of two stacked 55025 cores... 

SPICE tip SPICE models for the LM78S40 were not provided in the Micro-Cap software package. This circuit was simulated using IsSpice and PSpice only. 

Figure 4.73 State space SPICE model for the quasi-resonant Flyback circuit.

Construction of the SPICE model to measure the AC characteristics of this circuit made some simplifications. The low power outputs have a negligible effect on the AC characteristics of the control loop, and are not included in the SPICE model. The SPICE model schematic is shown in Fig. 4.73. 

In the SPICE model, when the closed-loop Bode plot was measured, LI was increased to 1 H and C3 was increased to 1 F. 

Measurements on the breadboard configuration were made at several output capacitor values. The results are shown in Fig. 4.74. The SPICE model was simulated at V5n = V DC (85 volts AC), with the... 

Figure 4.83 SPICE model of a single phase discontinuous flyback converter.

The SPICE transient model for this circuit is shown in Fig. 5.2. Note the additional 10 mf2 resistor (R14) that exists in the SPICE model but... 

The SPICE models were tested slightly differently than the breadboard. The SPICE test schematic is shown in Fig. 6.11. 

Our equivalent SPICE model of this circuit is shown in Fig. 6.16, where the inputs have been replaced by voltage sources. 

Three different measurements were made in order to characterize the performance of this amplifier circuit and show the correlation of the breadboard results to the SPICE models. The three inputs and their resulting measurements are described in detail in Table 6.1. 

In order to allow the Micro-Cap SPICE model of the window comparator to run properly, the AEI zener diode subcircuit was used instead of the 1N4733 model (SPICE. MODEL statement) that ships with Micro-Cap. The 2 V to 5 V square wave was fed into the modified Micro-Cap model. The results are shown in Fig. 6.41. 

The amplitude of the SPICE model result has about a 1-V offset missing from the result. This is due to the forward drop of the zener diode, which is not typically modeled in zener diode models. It is not difficult to model this parameter, but since the purpose was to show the zero offset result, it is not important here. 

Our equivalent SPICE model of this circuit is shown in Fig. 9.2. A 100 M 2 resistor (R4) has been added from the inverting terminal of the current sense pin to ground in order to help convergence and prevent singular matrix errors. 

The actual SPICE model of this circuit is shown in Fig. 10.2. Note that there are two resistors in series with each of the capacitors, Rl and R2. These resistors model the approximate equivalent series resistance (ESR) of the tantalum capacitors in the circuit at the switching frequency. 

This circuit was built in the lab using 1N4002 1A 100V rated diodes with 1 /U.F tantalum capacitors. The input pulse was a square wave from -3 V to +3 V, with a frequency of 5 kHz at a 50% duty cycle. The PULSE statement in the SPICE model is shown below ... 

The equivalent SPICE model circuit of the breadboard is shown in Fig. 10.29. The most drastic difference is the UC1846 circuit has been... 

Steven M. Sandler is the founder of AEi Systems, LLC, the world leader in SPICE modeling and worst case circuit analysis since 1995. He has developed and taught courses at Motorola University and has published many books and articles on circuit simulation for McGraw-Hill and Power Electronics, PCIM, and PEIN magazines. 

We built SPICE models for the critical paths in both implementations. The parametric RC parameters for in-chip layout structure are extracted using a commercial tool1 41. Obviously, full-chip SPICE simulation would be infeasible. Accordingly, we built a partial layout specifically for RC parameter extraction. The partial layout includes the original logic circuits, driver buffer, bus wire belong to a specific critical path as well as 3 neighboring wires on both side and typical layout structures in adjacent metal layers. 

The system model consists of two elements (1) a D-SPICE model of on-shore facilities and sub-sea utilities and (2) an OLGA 2000 model of the sub-sea production wells and pipelines. These two models are fully integrated and share a common, D-SPICE, user interface. 

---