Inversion layer channel

This figure displays the n-channel enhancement-type MISFET and the state of its inversion layer (channel), as well as the corresponding l/V characteristics under various gate and drain bias conditions. 

In a MOSFET, the surface conductance of the inversion layer channel between the source and the drain (Fig. 5.2-68) is controlled by the gate potential. The above formulas for the surface conductivity are applicable to MOSFETs under equiUbrium conditions (low frequency and low voltage). Here the interface states play the role of surface states at the free surface. The density of interface states should be kept to a minimum for optimal performance. Figure 5.2-69 shows the den-... 

As k g increases, the depletion width at the drain junction grows and can accommodate more charge. Thus, less charge is needed in the inversion layer to balance the gate charge. Because the surface potential at the drain edge of the channel is k g, when U g — < Up inversion can no longer be... 

The basis for the derivation of the current-voltage relationships is the calculation of the density of the mobile electrons in the surface inversion layer as a function of the applied voltages Vg and Vfo, and position along the channel. 

The electrical current flows from the source, via the channel, to the drain. However, the channel resistance depends on the electric field perpendicular to the direction of the current and the potential difference over the gate oxide. Should this surface be in contact with an aqueous solution, any interactions between the silicon oxide gate and ions in solution will affect the gate potential. Therefore, the source-drain current is influenced by the potential at the Si02/aqueous solution interface. This results in a change in electron density within the inversion layer and a measurable change in the drain current. This means we have an ion-selective FET (an ISFET), since the drain current can be related to ion concentration. Usually these are operated in feedback mode, so that the drain current is kept constant and the change of potential compared to a reference electrode is measured. 

A uniphase, buried-channel charge transfer device is disclosed in US-A-4229752 wherein a portion of each cell includes an inversion layer, or "virtual electrode" at the semiconductor surface, shielding that region from any gate-induced change in potential. 

When no bias is applied to the gate terminal (Vgs = 0), as in Fig. 4.1(a), no conductive path from source to drain exists, preventing current flow between these two terminals. However, for a gate bias larger than the so-called threshold voltage Vj. (Vqs > Vj), an n-type (inversion) layer, commonly referred to as the channel , develops at the surface of the semiconductor allowing electrons to flow between the source and drain terminals in response to a drain bias, as in Fig. 4.1(b). 

Both drain and source electrodes are fabricated as n-type semiconductor layers (aluminized to obtain contacts) and therefore no potential barrier exists between them and the n-channel, unlike the interface between n and p-types of semiconductors without the inverse layer. 

Figure 10 Impact of inversion layer mobility on the specific on-resistance of a 1000-V SiC UMOSFET. The percentage contributed by the channel resistance can be read from the right-hand side.

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