High current density interconnects

Several conclusions may be drawn from the results discussed in this section. Firstly, it appears that in almost all cases studied, the stabilization reaction involves decomposition intermediates instead of free holes. We will not comment on this point here (for a discussion, see ref. [52]). Similarly, we will not enlarge on the observation that in certain cases, Xj and in other cases X2 intermediates are involved, as these problems are beyond the scope of the present paper, which essentially pertains to anodic dissolution and etching. As far as this subject is concerned, two important points emerge, i. e., the fact that, due to the interconnection between stabilization and dissolution, the latter reaction tends to dominate at sufficiently high current densities, and the fact that, depending on the semiconductor and on the circumstances, dissolution either occurs by the DH or by the DX mechanism. In what follows, independent information on the latter point will be gathered, and the factors which determine the dissolution mechanism will be investigated. 

This major advance in nanoelectronic device fabrication was accompanied by key new insights into fundamental electronic behaviour at the atomic limit. Remarkably, the heavily doped silicon wires were found to have Ohmic conductance (i.e. their resistivity was independent of wire diameter or length) due to the very small separation between donors ( 1 nm, i.e. less than the Bohr radius). The abrupt doping profile - ranging from 10 cm outside the wire to 10 inside - yields very effective charge confinement. Moreover, and perhaps surprisingly, the atomic wires tolerate extremely high current densities (5 x 10 Acm ), comparable to those in state-of-the-art copper interconnects. 

Highly doped p-type silicon the pores propagate in the [100] direction and are polygonal in cross-section, with pore diameters in the range 10-100 nm depending on the etching current density. The pores are interconnected [79]. 

It was possible to correlate the measured electrical properties of the films deposited on different types of steps with the value of the step angle [13.20, 13.21]. Optimum properties for the fabrication of Josephson devices require high-angle steps in the substrate. In contrast, low-angle steps allow the fabrication of electrical interconnects and crossovers where a reduction of the critical current density has to be avoided. 

---