Hardware Description programming languages

VHSIC Hardware Description Language (VHDL) is a widely used hardware description language which has become a standard in many domsuns. A common traditional use of VHDL has been to construct VHDL descriptions modeling the hardware design and then simulate the VHDL program to show that it meets a set of informal specification criteria from which test vectors have been generated. However, this approach is often insufficient in critical applications where it is desirable to prove that the VHDL description meets a set of formally specified correctness criteria, and a formal semantics of VHDL is thus needed. 

Breuer, P., Delgado Kloos, C., Marm Lopez, A., Martinez Madrid, N. Sanchez Fernandez, L. (1997), A Refinement Calculus for the Synthesis of Verified Hardware Descriptions in VHDL , ACM Tmnsactions on Programming Languages and Systems 19(4), 1-30. 

Design entry in a high-level synthesis system is an algorithmic description written in a common programming language (like PASCAL or FORTRAN), or by a special purpose hardware description language (HIX), such as ISPS, DSL or VHDL. 

Silicon compilers, synthesis tools Software programs that can construct an ASIC whose functionality is no longer described by a circuit schematic but in a special high level computer languages, generally called hardware description languages or HDL. 

Complex Complex vertices allow groups of operations to be performed. They include model callSy conditionals, and loops, and are analogous to structured control-flow constructs in most programming and hardware description languages. 

In addition, we developed a hardware description language called Hard-wareC with particular attention to ASIC design specification issues. The system implementation of the algtaithms is provided by programs Hercules and Hebe, which serve as the front-end to Stanford s Olympus Synthesis system. They have been applied to the synthesis of benchmaric examples and to some chip designs at Stanford University. 

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