Field-effect transistors gate bias

The base of the field effect transistor in Figure 15-28 is constructed of p-Si with two n-type regions called source and drain. An insulating surface layer of Si02 is overcoated by a conductive metal gate between source and drain. The source and the base are held at the same electric potential. When a voltage is applied between source and drain (Figure 15-28a), little current flows because the drain-base interface is a /injunction in reverse bias. 

Fig. 2.19. (a) Scheme of a transparent field effect transistor based on ZnO [191]. The gate electrode consists of tin-doped indium oxide (ITO) and the gate dielectric is a multilayer of AECE/TiCE (ATO). (b) Output characteristics (drain-source current as a function of the drain-source voltage) for different gate voltages. The saturation current is about 530 rA at a gate bias of 40 V. From this output characteristics a threshold voltage of 19 V and a field-effect mobility of 27 cm2 V-1 s-1 were calculated [192]... 

Fig. 6.32. Time dependence of the induced defect density near the dielectric interface of a field effect transistor after the application of a gate bias. The measurement is of the threshold shift, AK, which is proportional to the defect density (Jackson and Moyer 1988).

Nanocrystal semiconductor memory (Tiwari et al., 1996) is another application based on the small capacitance of quantum dots (or nanocrystals, as they are often called in this context). In a conventional field effect transistor inversion is obtained by applying a suitable bias voltage to the gate. The incorporation of nanocrystals in the gate insulator would provide a means to apply a field offest by charging the quantum dots. Working devices have been successfully manufactured. 

Figure 3.25 A schematic of a typical enhancement-mode n-p-n metal-insulator-semiconductor field effect transistor. The device is normally off and eonduetion is enhanced by application of a negative gate voltage relative to the source, creating an n-type channel. The source-to-drain voltage adds to the gate bias when turned on, which is why the channel is wider at one side. The hatched area under the gate indicates an optional heavily-doped polycrystalline semiconductor region as part of the gate (see also Figure 3.27). One must further prevent current flow to the substrate as this would turn the device on as if it were a bipolar junction transistor and the base were the substrate.

The typical a-Si H thin film transistor (TFT) is a field-effect device, shown schematically in Figure 8.13. The electrodes are patterned on a glass substrate and the gate is covered by a dielectric, usually Si3N4. The active a-Si H layer is added on top of the dielectric and the device is finished with source and drain electrodes. Application of a bias voltage to the gate controls channel conductivity as usual in field-effect transistors. These switch power onto and off of electrodes in displays quickly and efficiently. 

---