Fault tree analysis intermediate event

Fault Tree Analysis. Fault trees represent a deductive approach to determining the causes contributing to a designated failure. The approach begins with the definition of a top or undesired event, and branches backward through intermediate events until the top event is defined in terms of basic events. A basic event is an event for which further development would not be useful for the purpose at hand. For example, for a quantitative fault tree, if a frequency or probabiUty for a failure can be deterrnined without further development of the failure logic, then there is no point to further development, and the event is regarded as basic. 

It is important in fault tree analysis to consider only the nearest contributing event. There is always a tendency to jump immediately to the details, skipping all of the intermediate events. Some practice is required to gain experience in this technique. 

In order to demonstrate the application of fault-tree analysis in the area of rail safety, using the fault-tree symbols defined in Chapter 4, a simple fault tree for fhe fop evenf—release of liquefied chlorine from a rail tank shell— is shown in Figure 7.1 [25]. The capital letters in the circles and rectangles of the fault-tree diagram in Figure 7.1 denote, respectively, basic and intermediate fault events associated with the rail tank shell. Each of these capital letters is defined below [25]. 

The principal problem in using fault trees is that for reasonably compHcated processes the analysis is most likely to produce a huge fault tree. Eault trees involving hundreds or even thousands of intermediate events are not uncommon. The effort involved in fault tree development can also be substantial, requiring several years. 

The reader should note that a fault tree includes the following (1) works backward from an undesirable event or ultimate consequence to the possible causes and failures, (2) relates the occurrence of an undesired event to one or more preceding events, (3) chain links basic events to intermediate events that are in turn connected to the top event, (4) is used in the calculation of the probability of the top event, (5) is based on the most likely or credible events that lead to a particular failure or accident, and (6) analysis includes human error as well as equipment failure. 

CONSTRUCTING THE FAULT TREE. Fault tree construction begins at the top event and proceeds, level by level, until all fault events have been traced to their basic contributing events or basic events. The analysis starts with a review of system requirements, function, design, environment, and other factors to determine the conditions, events, and failures that could contribute to an occurrence of the undesired top event. The top event is then defined in terms of sub-top events, i.e., events that describe the specific "whens and wheres" of the hazard in the top event. Next, the analysts examine the sub-top events and determine the immediate, necessary, and sufficient causes that result in each of these events. Normally, these are not basic causes, but are intermediate faults that require further development. For each intermediate fault, the causes are determined and shown on the fault tree with the appropriate logic gate. The analysts follow this process until all intermediate faults have... 

An Intermediate Event is an event that is one that has been designated for further development as the analysis progresses. For example, when developing the fault tree to do with the loss of production just discussed, an intermediate event could be Reactor shuts down. It is likely that, as the tree is developed, this simple phrase will be expanded as various reasons for reactor shutdown are considered. The reasons for reactor shutdown could include loss of feed, loss of flow of heating medium, or instrument malfunction. 

Figure 15.16 shows an or Gate below the Top Event. Entering the or Gate are two Intermediate Events. The first of these is System Fault —it covers all the equipment, instrument, and human failures that can cause the tank to overflow. The second input to the Top Event is All Other Events. This phrase covers all those events that could cause the Top Event to occur, but which have not been identified. It is a truism that no hazards analysis can ever be complete there will always be scenarios and hazards that were not identified, or not properly understood. Putting an All Other Events gate into the fault tree at this juncture serves as a reminder that no hazards analysis can ever be complete and that predicted risk values are hkely to be overly optimistic. 

It is necessary to add here that a remarkable freedom exists in the proportion in which event trees and fault trees can be used in a specific probabilistic analysis. Indeed, large event trees and small fault trees can be chosen (or vice versa) with all the intermediate grades. Here, reference has been made to the most common way, which uses event trees up to the primary safety systems, and fault trees for the determination of the failure probabilities of the primary systems, also on the basis of the failure probabilities of their support systems. 

Events There are four kinds of events. There are symbols for each. A rectangle represents a. fault event as a top or intermediate event that a tree must describe further. In a quantitative analysis, a probability for a fault event results from computation of elements below it in the tree. 

Then one must apply Boolean algebra to each logic gate to determine the probability of each intermediate event. Ultimately, the analysis calculates the probability for the top event. Example 36-1 illustrates the fundamentals of this process for the fault tree shown in Figure 36-5. 

The fault tree development proceeds in this manner until all output board failures that can affect the output contact of Interest are analyzed, and one of the Intermediate events is "Signal from the data bus on the motherboard incorrect". A manner in which this can occur is the existence of faults in those components on the CPU and other I/O circuit boards that are directly connected to the motherboard. The other mechanism is that the data signal to the motherboard from the CPU board is Incorrect, which then entails an analysis of the CPU board. 

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