Deep Trench Capacitor

The acceptance of chemical mechanical planarization (CMP) as a manufacturable process for state-of-the-art interconnect technology has made it possible to rely on CMP technology for numerous semiconductor manufacturing process applications. These applications include shallow trench isolation (STI), deep trench capacitors, local tungsten interconnects, inter-level-dielectric (ILD) planarization, and copper damascene. In this chapter. 

There are several possible applications that have been considered (i) polysUicon CMP for deep trench capacitor... 

Figure 1.64 Cross-section of a Best -cell DRAM (BuriEd STrap) showing the MOSFET access transistor and the storage trenches (deep trench-capacitor) 0.25 (Xm feature size (256 Mbit DRAM).

Figure 1.73 Examples for stack-capacitor DRAMS. In contrastto the deep trench capacitor that is etched into the Si below the access transistor, the stack capacitor is deposited on top of the access transistor. Ta205 is used as the dielectric film.

Storage capacitor deep trench I Word line 2 Word line 3... 

The most advanced chip-based ion detectors are the microfabricated Faraday cup arrays fabricated by Darling of Washington University [10], used with a compact linear dispersion magnetic mass spectrograph. Deep reactive ion etching of silicon was used to form high-aspect ratio trenches, which were then oxidized and metallized to form an array of independently addressable MOS capacitors as shown in Fig. 3c. Detector arrays were constructed with up to 256 elements and with pitches down to 150 pm, and the arrays have been combined with an electronic multiplexer to allow serial readout. 

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