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Local tungsten interconnects

The acceptance of chemical mechanical planarization (CMP) as a manufacturable process for state-of-the-art interconnect technology has made it possible to rely on CMP technology for numerous semiconductor manufacturing process applications. These applications include shallow trench isolation (STI), deep trench capacitors, local tungsten interconnects, inter-level-dielectric (ILD) planarization, and copper damascene. In this chapter. [Pg.5]

A number of works have focused on the pattern dependencies in tungsten (both tungsten via and local interconnect) polishing [12,19,21]. To first order, empirical results seem to suggest that dishing is dominated by the width or size of the metal feature being polished wide lines tend to suffer... [Pg.126]

Another possible application of tungsten silicide is that of local interconnect [Mihara et al.215]. We will refrain from a further discussion of this application. [Pg.175]


See other pages where Local tungsten interconnects is mentioned: [Pg.6]    [Pg.646]    [Pg.319]    [Pg.185]    [Pg.103]    [Pg.154]   
See also in sourсe #XX -- [ Pg.5 ]




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