Dataflow architecture

Naini, M. (1989) A Dedicated Dataflow Architecture for l dware Conqnlation. 22° Aimual Hawaii International Conference on System Sciences. 

Jenn, E., Arlat, J., Rimen, M., Ohlsson, J., Karlsson, J. Fault Injection into VHDL Models The MEFISTO Tool. In Twenty-Fourth International Symposium on Fault-Tolerant Computing, FTCS-24. Digest of Papers., pp. 66-75 (1994) Kienhuis, B., Deprettere, E., Vissers, K., van der Wolf, P. An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures. In Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors, pp. 338-349 (1997)... 

Logic synthesis and optimization results Synthesis of the dataflow architectures... 

AU other possible failure impacts by the microcontroller to the application software need to already be controlled by the basic software. However, it is a question of preferred software architecture, where the error types are safeguarded. It would be possible that the errors are controlled in the basic software. Especially data correction, control mechanism or implemented safely mechanism versus systematic errors from the peripheral, sensors and also from the microcontroller itself effectively implemented in the basic software would simpUfy the application software and related safety mechanism. If possibly the application software needs only safety mechanism against their own systematic faults or safely mechanism which are implemented in software but control the systematic failure on system level could simplify the needed architecture and related dataflow tremendously. Since safety goals are often also subjects to change, the safely mechanisms against systematic failures on system level should be implemented in an independent area. 

The architecture statement part contains a series of concurrent statements that describe the function of the block in a structural, dataflow or behavioural style, or some combination of these. 

A dataflow style architecture models the hardware in terms of the movement of data over continuous time between combinational logic components such as adders, decoders and primitive logic gates. It describes the register-transfer level behaviour of a circuit. The language topics that are most relevant to the dataflow style of architectures include the following ... 

The function of a circuit can be described in one of three architectural styles - structural, dataflow or behavioural. 

The architecture body describes the function of the multiplexer circuit using a dataflow, behavioural or structural design style. An architecture must... 

Four architecture bodies have been constructed using concurrent signal assignments in the dataflow style. These are shown in Figure 4.3. 

Conditional signal assignment architecture DATAFLOWS of MUX4TOI is begin... 

With a second level of parentheses, the structure of the circuit changes. Figure 4.15 shows the multiplexer circuit produced by the architecture DATAFLOW . It looks similar to the circuit produced by DATAFLOW , but the second level of parentheses has forced the pre-evaluation of the select logic -. ..not SI and not SO..., etc. - for each input. These four internal signals are then Anded with the appropriate input signal. The product operations are performed in the same order as before. 

The branch conditions in the architecture DATAFLOWS are evaluated by the first and second logic stages in the circuit. The next four levels provide the signal inhibition or selection logic. Only one of the four input signals is passed to the four-input Or gate, which finally generates Y, Hence, this... 

Table 4.4 Logic synthesis and optimization statistics for the dataflow style architecture...

Table 5.1 Logic synthesis and optimization statistics for four synchronous dataflow-style architectures with and without external initialization signals. Compares If and Wait versions...

Table 6.2 Logic s)nithesis and optimization statistics for the ripple carry adder architectures and the signed dataflow structure. Timing constraints were met in each case. No final area constraint was applied...

---