RC Delay and New Interconnect Materials

3 FORMATION OF FUNCTIONAL MICROSTRUCTURES 1.3.1 RC Delay and New Interconnect Materials 

Miniaturization of semiconductor devices has been a continuous trend in the microelectronics industry. The decrease in minimum feature length reduces the overall device size, increases the packing density, and thus reduces the cost of 

FIGURE 1.9 Delay time vs. gate length (from Ref. 41). 

The two key components in interconnect delays include the inherent resistance (R) of the metal lines and the capacitance (C) of the dielectric material in between the lines. The so-called RC delay is defined as the time required for the voltage at one end of a metal line to reach 63 % of its final value when a step input is presented at the other end of the line [18]  

There are two types of capacitances associated with interconnect—the line-to-ground capacitance and line-to-line capacitance as illustrated in Fig. 1.10. Although line-to-substrate capacitance decreases as the feature size decreases, 

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