Optically gated interfaces

Because of the small volumes encountered in CE, implementing CE as a second dimension is difficult if a valve is used. More efficient, lower volume unions have been utilized in a number of cases. The main types of these interfaces include optical gating and flow gating, which are discussed below. Electrical gating is described in detail in Chapter 15. Fraction collection is also used, as discussed in Chapter 16, although this takes longer and is a less efficient method than the other comprehensive 2D schemes. Chip-based separation systems typically use some form of electrical gating and these systems will be discussed below. 

The micro flow cell Golden Gate [125] can tolerate up to 66 bar at temperatures up to 200 °C. The cell volume amounts to 28 ml and fluidic interfaces are 1/16 in Swagelok capillary fittings. While the dimensions of the actual flow cell are only a few centimeters, the actual optical interface to a spectrometer consist of a macroscale table-top device with a clamping mechanism which positions the flow cell in the optical pathway. 

After being in the realm of science fiction for a considerable time, molecular logic gates are now among us for real. Virtually all of the simpler logic types now have molecular implementations. Chemical, optical, and electrical interfaces proved successful for communication across the billion-fold size difference between molecules and ourselves. When we appreciate that these successes arrived in less than a decade, it is elear that the future will be fun. 

Such an evolution may not continue at the same speed Electrical limits are reached and future hardware functions will not improve a lot. Using gate array, special VLSI circuits, and new connectors to make the bus interface more compact is the only way to lower the price and improve the bus performance. Optical transmission may add new possibilities, but it is not suitable for buses and does not yet seem ready to leave the laboratory. The evolution is not very fast, because of the need to set up multivendor standards, develop special VLSI circuits, and get some return on investment before the next generation. 

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