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Hard mask

In this study, the reactive ion etching of Co2MnSi magnetic films with TiN hard mask was investigated in an inductively coupled plasma (ICP) of a Cl2/02/Ar gas mix. The effects of gas concentration on etch characteristics of Co2MnSi films were explored. [Pg.377]

Fig. 5. FESEM micrographs of Co2MnSi films etched in (a) 20% Cb/Ar, (b) 60% Cb/Ar, (c) 10% 02/10% Cb/Ar and (d) FESEM micrograph of etched MTJ stack arrays using TiN mask at 20% O2/10%Cb/Ar. TiN hard mask were used... Fig. 5. FESEM micrographs of Co2MnSi films etched in (a) 20% Cb/Ar, (b) 60% Cb/Ar, (c) 10% 02/10% Cb/Ar and (d) FESEM micrograph of etched MTJ stack arrays using TiN mask at 20% O2/10%Cb/Ar. TiN hard mask were used...
FIGURE 1.6 Incorporation of hard masks to protect the low-k dielectric materials (from Ref 23). [Pg.8]

With this optimization technique, topography is reduced after the planarization step. The STI trenches are filled with polysilicon instead of Si02 [39]. After trench, etching, the first patterned hard mask is stripped and a new continuous oxide/nitride layer is deposited for electrical isolation between the substrate and the trench polysilicon. After CMP, the dishing in isolation areas is counteracted by a high-temperature oxidation step, which oxidizes the upper part of the remaining polysilicon in the trenches. As the volume of the Si02 is... [Pg.363]

Massive electrochemical attack known as galvanic corrosion [58,59] is the most severe form of copper corrosion. It can completely remove the copper from the structures (Figs. 17.25 and 17.26). It can occur when the wafers are exposed to a corrosive electrolyte for an extended period. It can also occur if the slurry does not contain enough or effective corrosion inhibitor. The source of such a galvanic potential on the patterned copper surface may be due to the fact that some copper structures connected to transistors have a different electrical potential than the rest of the wafer surface. Another possible cause of this type of galvanic potential is related to the barrier material induced metal metal battery effect. Most copper CMP slurries have been developed for Cu structures with Ta or TaN as a barrier material. In some cases, other metals may also be used in addition to the barrier metal. For example, a metal hard mask could contribute to the galvanic corrosion effects. It is also possible that some types of copper are more susceptible to corrosion that others. The grain... [Pg.534]

Increase of Aspect Ratio for DT Si Etch up to 60 The maximum achievable DT depth is not limited by an Si Reactive Ion Etch (RIE) stop, but by hard mask erosion [277-279]. A boron doped silicon oxide (BSG) is used as the hard mask material (CVD deposition). The BSG is patterned by conventional photoresist technology. A photoresist to BSG RIE selectivity of above 4 1 is possible. In turn, the BSG hard mask to Si RIE selectivity was found to depend on the DT top dimension (lateral DT perimeter). The corresponding experimental relationship is shown in Figure 1.66 for a conventional Si RIE tool set. For each data point the required BSG... [Pg.84]

Figure 1.66 Measured hard mask (BSC) to DTSi RIE selectivity as a function of feature size for different etch processes (single and multiple etch). The hard maskthickness required to achieve a DT aspect ratio (AR) of 45 (single etch) or 60 (multiple etch) is given for each data point. Figure 1.66 Measured hard mask (BSC) to DTSi RIE selectivity as a function of feature size for different etch processes (single and multiple etch). The hard maskthickness required to achieve a DT aspect ratio (AR) of 45 (single etch) or 60 (multiple etch) is given for each data point.
The three main approaches to multilayer resist imaging systems (see Chapter 16 for details) include (i) hard mask (HM) processes, (ii) top surface imaging (TSI) processes requiring latent image formation only near the surface of the resist, thus circumventing any transparency requirements, and (iii) bilayer resist (BLR)... [Pg.391]

The hard mask approach employs ultrathin resist films, typically < 100 nm, as the imaging layer, which are coated over inorganic hard mask substrates such as silicon oxynitride, silicon nitride, amorphous carbon, etc. [Pg.392]

There exist applications where the traditional hard mask can be left in place without any adverse effect on the performance of the device. For instance, in DRAM devices, SiON can be left on the gate layer, where it can serve as part of the self-aligning sequence of the storage cell and bit line contacts. It must be... [Pg.436]

Damascene applications involving silicon-containing resists and silicon-containing hard mask materials with antireflection properties... [Pg.437]

The advantageous properties of these spin-on silicon-containing resists and hard mask materials with antireflection properties make these materials ideal candidates for dual damascene applications (see Fig. 9.10). They offer advantages over the conventional materials because they have better etch selectivity to the resists they also tend not to suffer from the residue issues during etch and removal associated with conventional approaches. They now dominate in these applications, although spin-on carbon hard masks are emerging as worthwhile alternatives. ... [Pg.437]

One of the drawbacks of Si-containing resist and Si-containing hard mask materials is their propensity to outgas during exposure, which might lead to Si02 contamination of optical elements in the exposure tools. SUesquioxane-based materials appear not to suffer from this problem. [Pg.438]


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See also in sourсe #XX -- [ Pg.391 , Pg.435 ]

See also in sourсe #XX -- [ Pg.10 ]




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