Flip-flop master-slave

Each of the above types of flip-flops come in the master-slave configuration. 

A master-slave flip-flop is actually two flip-flops in one, with a master flip-flop that feeds data to a slave flip-flop. A JK master-slave flip-flop and clock-input waveform are presented in Figure 23.16. In this figure, the various internal gates and connections are presented for the sake of illustration. In actual practice, the symbols for master-slave flip-flops are not distinguished from those already presented almost all clocked flip-flops available in integrated-circuit form are of the master-... 

Figure 23.16. The JK master-slave flip-flop. From S. P. Perone and D. O. Jones, Digital Computers in Scientific Instrumentation, New York McGraw-Hill, 1973, by permission of the publisher. Copyright 1973 by McGraw-Hill, Inc.

A data latch can be built using JK flip-flops, clocked flip-flops, and all varieties of synchronous master-slave flip-flops (see Figure 23.17B). The clocked flip-flop data-latch operates in much the same way as the RS flip-flop data-latch the TP line must undergo a negative-going 1 to 0 transition each time data is transferred. However, the clocked flip-flop data-latch will operate only in a synchronous manner (that is, each time a negative-going clock pulse is present), in contrast to the RS flip-flop data-latch, in which the outputs will follow the inputs whenever the TP input is 0. 

The simplest shift-register is the serial I/O type, shown in Figure 23.18 (omitting the dashed-line outputs). The 4-bit register presented is constructed from master-slave clocked flip-flops. (It can also be constructed from JK flip-flops in exactly the same manner but it cannot be constructed from RS flip-flops.) Notice that a shorthand notation, with the AND gate symbols omitted, is used for the clocked flip-flops. 

Often one needs counters in an interface to divide down the clock frequencies and to count such events as the number of data points taken and the number of times data exceed a predetermined threshold. The flip-flop used in modern integrated-circuit counters is the master-slave JK flip-flop. It is used to construct two basic types of counters, asynchronous and synchronous, that will count up or down in a variety of counting schemes. 

Set-Reset Latch Truth Table Set-Reset Latch Macrotiming Diagram J K Latch T Latch D Latch Synchronous Latches Master-Slave Flip-Flops Standard Master-Slave Data Flip-Flop Sequential Logic System Description... 

Standard Master-Slave Data Flip-Flop... 

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