Eutectic solder bumps

Figure 11-15 shows eutectic solder bumps placed onto a 18 x 18 test substrate with 100-pm diameter pads on 250 pm centers. The solder volume deposited per pad is equivalent to a drop diameter of 100 pm. The solder bumps acquire the shape shown in Figure 11-15 is a result of rapid solidification [18]. The bumps were placed at the rate of 400 s by raster-ing the substrate in the horizontal direction of the rows of solder bumps. 

UF-3400/ 3MCo. No-flow, unfilled epoxy resin - FUp-chip/BGA or CSP assembly and CSP bonding to PWBs (tin/lead eutectic solder bumped devices) Automated dispensing (22- gauge needle) CSP assembly and FCOB and CSP bonding to laminates. 

For flip-chip applications, the eutectic Bi-Sn solder alloy was electroplated to form solder bumps on various under-bump metallizations (UBMs) [37]. Based on the nature of the interfacial reactions and ball shear strength exhibited when exposed to multiple reflow cycles, Bi-Sn solder bumps were identified as a potential candidate for replacing the Pb-Sn eutectic solder bumps. 

Baggerman, A. Schwarzbach, D. 1998. Solder-jetted eutectic PbSn bumps for flip-chip. IEEE Transactions on Components Packaging and Manufacturing Technology Part B-Adv. Packaging 21 371-381. 

Liu YH, Lin KL (2005) Damages and microstructural variation of high-lead and eutectic SnPb composite flip chip solder bumps induced by electromigration. 

Flip-chip solder bumps Pb-3Sn, Pb-5Sn, Pb-50In, eutectic Sn-Cu... 

EGA solder bumps Dual-solder bumps Pb-lOSn (ball) and eutectic Sn-37Pb (ball and card attachments) Single-solder bumps eutectic Sn-37Pb, eutectic Sn-Pb-2Ag, Sn-Ag-Cu... 

Alternatively, a low-melting-temperature solder (e.g., the eutectic Pb-Sn alloy) may be utilized to attach a silicon chip (having high-Pb, Pb-Sn solder bumps) to organic printed circuit boards. The circuit boards are not damaged by the low-temperature solder attachment process. This version of flip chip assembly is referred to as direct chip attach (DCA) or flip chip on board (FCOB) technology. 

A second flip chip technique is realized by the use of eutectic Pb-Sn or other low-melting-temperature solder bumps in place of high-Pb solder bumps. These chips can be directly reflow attached to the chip carrier using low temperature. In this application, the chip carrier can be either ceramic or an organic laminate. 

Jang, S.Y. Paik, K.W. Comparison of electroplated eutectic Sn/Bi and Pb/Sn solder bumps on various UBM systems. Proc. 50th ECTC Las Vegas, NV, May 2000 64-68. 

Although there has been significantly more research carried out on Pb-based solders than Pb-free solders, the literature is scanty compared with other conductors such as Cu, Al, and their alloys. Lead-based solders are two-phase alloys (Fig. 6), usually combined with Sn, but sometimes alloyed with other metals depending on the specific application. In many applications, such as in microelectronics, where low melting points are desired, eutectic (63% Sn/Pb) or near-eutectic solders are used, but high-Pb (>90%Pb) solders are typically used for flip-chip solder bumps owing to their resistance to electromigration. 

Lee, T.Y. Tu, K.N. Frear, D.R. Electromigration of eutectic SnPb and SnAgs gCuo flip chip solder bumps and under-bump metallization. J. Appl. Phys. 2001, 90, 4502-4508. 

The elastic-plastic-creep behaviors of the two lead-free solders and the eutectic tin-lead solder bumped WLCSP on PCB assembfies subjected to the novel temperature cycle test was discussed in this study. It can be seen that in the case of the same scale to the WLCSP and the WLCSP with imderfill, the difference of the equivalent total strain range exceed an order of magnitude for these three solder joints. 

Figure 12.4. Left—Scanning electron microscope image of the input/output pads of a silicon IC bumped with eutectic lead/tin solder after solder reflow. Right—Photograph of printed wiring board interconnect pads that have been printed with lead/tin solder prior to reflow.

Nucleation. As a molten solder contacts aCu substrate, CusSns (q) forms instantaneously. The nucleation kinetics of the q-phase IMC were investigated in Ref 35 by hot dipping copper coupons into a molten tin bath at temperatures varying from 240 to 300 °C (464 to 572 °E). The formation of q nuclei as small, round bumps at the molten Sn/Cu interface was observed after just 1 s at temperatures between 240 and 300 °C (464 and 572 °E). After as little as 10 s, experimental observations of Sn and eutectic Sn-Pb indicated that the q phase is continuous over the Cu substrate surface (Ref 34, 36, 37). Once a continuous layer is established, further growth requires diffosion of the reacting species (Sn and/or Cu) through the intermetallic layer. 

---