Etching Process and Technologies

This chapter presents an overview of performance plastic polymers in commercial planar and 3-dimensional circuit board products, and describes in detail one approach (two-shot molding) developed as an integrated 3-D circuit manufacturing technology. The distinctions between conventional planar (2-dimensional) circuitry, based on thermoset laminates and "subtractive etching processes, and the enhanced design flexibility afforded by expanded interconnection capacity in three axes are discussed. Specific examples of 3-dimensional interconnect protoypes and products are described and pictured. 

DYCOstrate. A different approach to small via creation has been taken by Dyconex AG of Switzerland. After ground and power patterns are formed on the panel, and the panel is oxide-treated, polyimide-backed copper foil is laminated on the panel. Holes in the copper are formed by a chemical etching process, and the insulating polyimide material underneath the holes is removed by plasma etching. PWBs made in such a way are called DYCOstrate. In other, similar technologies, different dielectric materials are used, and they are removed by alkaUne solutions. The rest of the process is similar to that for SLC that is, holes are metallized and a thick copper deposition is made by electroless or galvanic plating, and the circuit pattern is formed by a tent-and-etch process (see Fig. 5.5). 

The mold inserts in silicon (Figure 1.271) are produced by lithographic and etching processes, a technology that has been known for decades in the electronics industry. New in this area are the 3D methods, which make the impression of very small structures possible. In mold making, the fixing and protection of mold inserts is important. The fracture risk is very high. 

S. M. Rossnagel, J. J. Cuomo, and W. D. Westwood, eds.. Handbook of Plasma Processing Technology—Fundamentals, Etching Deposition, and Suface Interactions, Noyes PubUcations, Paik Ridge, N.J., 1990. 

Ion implantation appears as the only feasible method to accomplish selective area doping of SiC in planar device technology. As described in this chapter, substantial progress has been made during recent years but several fundamental issues and technology barriers remain before the implantation process is fully developed and can be truly implemented in SiC device processing. Eor instance, mesa-etched p n-diodes... 

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