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Trained Nanocells

Training a NanoCell in a reasonable amount of time will be critical. Eventually, trained NanoCells will be used to teach other NanoCells. NanoCells will be tiled together on traditional silicon wafers to produce the desired circuitry. We expect to be able to make future NanoCells 0.1 pm2 or smaller if the input/output leads are limited in number, i.e. one on each side of a square. [Pg.94]

The primary factor in determining the functionality of a NanoCell is the I(V) characteristic of the molecule used. Hence, we have found that before beginning to train NanoCells it is essential to first gain an understanding of the particular molecule used. [Pg.284]

We further experimented with training NanoCells using another Monte-Carlo search algorithm, simulated annealing. Simulated annealing produced essentially the same results as the GA. It is our opinion that in this case, the particular base search algorithm is not nearly as important as the manner in which it is adapted to the NanoCell problem. [Pg.296]

Previously in this chapter it was noted that to train voltage in - current out inverters and NANDs the NanoCell just needs enough molecules in the on state. In working with NanoCells composed of just a few molecules we found that for inverters, a path of molecules in an on state between the input and output is both necessary and sufficient. If the molecules are not symmetric, then they must be oriented so that current flows from the input to the output. The conditions for NANDs are similar. First, obviously it is necessary that there is a path from each input to the output. In training NanoCells and working with a few molecules, we observed that it is sufficient to have paths firom each input to the output, some of which should intersect. [Pg.320]

In training NanoCells we discovered that occasionally a certain NanoCell would only function as the desired logic gate if the input voltages were applied in a certain order. Suppose we want to train the NanoCell whose output is shown in Figure 6.74 as an inverter. Table 6.9 displays the desired output and actual output for each truth test. Only the fourth test fails. The output should be off but is actually on . Note that if the truths had been applied as off , on , off, then the NanoCell would have tested as an inverter. This is the way NanoCells are currently trained. Each possible truth is tested once, with the exception of the case where every input is off. This case is tested both first and last. However, for some NanoCells this may not be sufficient. Note that in Table 6.9, each output transition is tested. That is, each truth is tested when the output was previously off and when it was previously on . This provides a method for training more robust NanoCells. [Pg.339]

The output transitions algorithm is not something that we currently use in NanoCell training because of the significant increase it would cause in training time. However, in the future we may use the algorithm to evaluate the robustness of trained NanoCells. Nanocells that do not perform the desired logic for every output transition would then be trained further. [Pg.346]

Husband, C. P., Thesis Proposal Mortally Training Nanocells, Rice University, 2002. [Pg.363]

The NanoCell training problem as stated is extremely difficult. We are just now beginning to make progress on this problem using neuro-dynamic programming. These initial results are encouraging, but before attacking this... [Pg.280]

Before exploring the optimization problems with the assumption of omnipotence and omniscience, it is worthwhile to ask whether such a problem is of practical use or is merely an academic exercise. This molecular electronics project is currently in the proof-of-concept phase. Before determining whether it is possible to train a NanoCell with realistic constraints, we are attempting to verify whether it is theoretically possible. If it becomes clear that it is impossible to train a randomly assembled NanoCell as a 2-bit adder, even with the assumptions of omnipotence and omniscience, then there is no point in trying to train one without these simplifying assumptions. Hence, the optimization problem with the supposition of omnipotence is of practical use. [Pg.281]

The simplified NanoCell training problem is particularly well suited to genetic algorithms. After presenting the fundamentals of genetic algorithms, a heuristic for solving this optimization problem is presented. [Pg.281]

Figure 6.25 This is a clock NDR used in simulating NanoCell training. The resulting low and high voltages, V/j, and V,n are shown, as well. Figure 6.25 This is a clock NDR used in simulating NanoCell training. The resulting low and high voltages, V/j, and V,n are shown, as well.
In adapting the GA to the NanoCell training problem, the fitness function is the most difficult issue. First consider the voltage in - current out setup. Recall that Iql and Iqh denote the high and low output current thresholds. [Pg.296]

Before we began simulating the training of NanoCells, no one knew whether anything useful could be done with a random array of NDR devices. With the NanoCell simulator, we have shown that in fact NanoCells can be trained as fairly complex logical devices with the simplifying assumption of omnipotent training. [Pg.298]

In this section the results of the simulated training of voltage in -current out NanoCells are presented. Using this design, several complex, negating logic gates were trained, many of them easily. Except for the four NANDs and the 1 -bit adder, all of these NanoCells were trained with the version of the simulator that worked with IsSpice. [Pg.298]

Figure 6.32 This is a NanoCell trained as an inverter. Pin A is set to input, and pin 1" is set to output. The input voltage and output current are displayed, as well. Figure 6.32 This is a NanoCell trained as an inverter. Pin A is set to input, and pin 1" is set to output. The input voltage and output current are displayed, as well.
It took an average of four generations to train each inverter. The simulation time depends primarily on the number of molecular switches in the NanoCell. To run a generation of 25 individuals it takes approximately 10 sec if there are 10 switches, 25 sec if there are 100 switches, and 250 sec if there are 1000 switches. Hence four generations took about 160 sec on a 800 MHz desktop PC, virtually all of which was simulation time for IsSpice to operate. In actual physical training time we estimate that this would take on the order of 1 msec since the NanoCell and test electronics can operate at a rate of 100... [Pg.299]

NanoCells were randomly generated, and all 12 were successfully trained. However, the pin settings had to be adjusted to get one of the NANDs... [Pg.300]

Finally, a 1-bit adder has been trained (Figure 6.34) with a 70-nanoparticle, 1000-molecular switch NanoCell, where the molecules exhibit rectifying diode behavior as displayed in Figure 6.7. In Figure 6.34, the pins labeled A are set to the first input, those labeled B are set to the second input, and those labeled C are set to the third input. The output pins are labeled 1 and 2 . High input voltage is set at 1.8 V, while low input voltage is set at 0 V. The output pin is considered off if there is < 50 pA recorded. It... [Pg.301]


See other pages where Trained Nanocells is mentioned: [Pg.284]    [Pg.292]    [Pg.295]    [Pg.296]    [Pg.298]    [Pg.312]    [Pg.314]    [Pg.347]    [Pg.349]    [Pg.351]    [Pg.284]    [Pg.292]    [Pg.295]    [Pg.296]    [Pg.298]    [Pg.312]    [Pg.314]    [Pg.347]    [Pg.349]    [Pg.351]    [Pg.93]    [Pg.262]    [Pg.264]    [Pg.266]    [Pg.268]    [Pg.273]    [Pg.274]    [Pg.279]    [Pg.279]    [Pg.280]    [Pg.280]    [Pg.280]    [Pg.280]    [Pg.281]    [Pg.292]    [Pg.298]    [Pg.299]    [Pg.301]    [Pg.302]   


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