Technology mapping

Figure 1 Technological map for the applicability of different technologies of wastewater treatment. Elaborated from Centi and Perathoner ...

E. Cahill, F. Scapolo, K. Ducatel, T. Miinker, M. Aguado, P. Eder, L. Leone, and H. Hernandez, The Futures Project Technology Map. EC TECS (Report EUR 19031EN), Brussels, 1999. 

E. Clarke, K.L. McMillian, X. Zhao, M. Fujita J.C.-Y. Yang (1993), Spectral Transforms for large Boolean Functions with Application to Technologic Mapping, in 30th ACM/IEEE DAC , Dallas, TX, pp. 54-60. 

E. Clarke, K. L. McMillan, X. Zhao, and J. C.-Y. Yang. Spectral transforms for large Boolean functions with application to technology mapping. ACM/IEEE Design Automation Conference, pages 54-60, June 1993. 

In addition, effort has been spent on the optimizations related to technology mapping. In contrast to the majority of the approaches in literature until recently, the focus has been on performance-driven mapping onto compiled functional cells [28]. 

This chapter addresses the performance-driven issues in high-level controller design. In particular, effective ways to decompose the controller architecture are presented. The effect of compiled cells on performance-driven technology mapping is also discussed. Finally, it provides results on formal verification aspects in a real-time context. 

M. R. C. M. Berkelaar and J. A. G. Jess. Technology mapping for standard cell generators. In Proceedings of the IEEE International Conference on Computer-Aided Design, ICCAD-88, Santa Clara, CA, 1988. 

H. Pallisgaard, Principles of technology mapping for CMOS functional cell generators. In Proceeding of the ASCIS Open Workshop on Controller Synthesis, Technical University of Denmark, Lyngby, Denmark, Sep 1991. 

See also Atmospheric Sciences Avionics and Aircraft Instrumentation Communications Communications Satellite Technology Maps and Mapping Meteorology Probability and Statistics Risk Analysis and Management Vertical Takeoff and Landing Aircraft. 

Fig. 9.10 Representative drug properties and data for a wide range of SDD formulations from a solubilization technology map (a), showing how the microcentrifuge test can be used to qutmtify precipitation inhibition (b), and to show negative impacts on dissolution rate for properties such as increased particle size (c)...

To visualize the interrelationships of the three elements, see Fig. 2.2. It shows these elements as axes of a three-dimensional technology map that defines the passage from conventional PWB structures to advanced technologies and shows how changes in just one of the elements can increase or decrease the total density of the entire electronic package. 

FIGURE 2.2 Component technology map, showing the relationship of assembly, PWB, and component... 

The interactions among printed circuit boards, components, and assemblies are best seen by the packaging technology map (see Chap. 2 Fig. 2.2). Components are characterized by the average I/Os per part, assembhes by the components per sq. cm and I/Os per sq. cm, and the printed circuit by its wiring density in cm per sq. cm Fig. 22.1 shows the approximate crossover between the traditional printed circuit board and the next generation with microvias. ... 

Elke A. Rundensteiner, Daniel D. Gajski, and Lubomir Bic, The Component Synthesis Algorithm Technology Mapping for Register Transfer Descriptions , Proc. of ICCADVO, pages 208-211, November 1990. 

For example, optimization by OPTMAP of the cpul circuit described in Section 7.12 resulted in 13,914 equivalent gates and 6,017 nets. The CPU time for the whole delay calculation was about 5 seconds. The technology mapping and local optimization of this circuit was completed within 500 seconds on an Apollo Domain Series 10000. 

A variety of statistics are generated by the synthesis tools for each circuit. When generic libraries are being used these data bear little similarity to the characteristics expected from a technology mapped design. However, they provide a dear basis for the comparison of the area and speed characteristics of the different circuits. The following statistics are presented for each drcuit ... 

LirUi to logic synthesis Each expression block is directly passed to logic synthesis for minimization and technology mapping. The results are fed-... 

---