Silicon-based substrates, fabrication technology

Silica-based PLCs are fabricated with various kinds of technologies. The substrate material is either silica or silicon. Several typical fabrication technologies are (1) flame hydrolysis deposition (FHD), (2) low-pressure chemical vapor deposition (LPCVD), and (3) plasma-enhanced chemical vapor deposition (PECVD). FHD will be de-... 

Whether organic solar cells will be commercially employed in the future will be decided by economic aspects. It is certain, however, that their fabrication is simpler and cheaper than that of silicon-based solar cells. Furthermore, they have the advantage that they can be produced on flexible and light substrates. In addition, solar cells based on polymer systems can be fabricated using printing technology. 

Gas sensors based on field ionization from multiwall carbon nanotube arrays grown on PSi templates have been developed (Nikfaijam et al., 2010). Such sensors showed good sensitivity, selectivity and short response times, as well as higher discharge current and good mechanical stability in comparison with those which were fabricated on polished silicon substrates. Validation of the compatibility between PSi-based gas sensor technology and standard microelectronic processes has been demonstrated (Barillaro etal.,2010). 

Low-aspect-ratio (ratio of the height of the microelectrode divided by its lateral dimension is larger than 0.2) microelectrode arrays are fabricated using conventional silicon-based microfabrication technologies, such as hthographic techniques to yield arrays of thin films of metallic or carbon electrodes on a silicon substrate. These arrays often have limited stability and life times as a result of defects in the metal layer poor resistance to corrosion is... 

In addition to the deep boron-diffiision process to define silicon probe shape used in Michigan probes, silicon-on-insulator (SOI) technology has also been used to fabricate planar silicon-based microelectrode arrays [22]. The top single-crystal silicon device layer of an SOI wafer is separated from the silicon substrate by a dielectric layer. This dielectric is typically silicon dioxide from 1 to 2 jim in thickness. In this fabrication process, the probe thickness is defined by the device layer of the... 

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