Silicon-based emitters

Silicon (Si) is the most widely used material of the electronics industry. Unfortunately, it is an indirect gap semiconductor and, thus, the efficiency to emit photons upon electronic excitation or charge carrier injection is extremely low since the radiative recombination of the electron-hole pair is not allowed without the assistance of a momentum-conserving phonon. Moreover, the existence of defects leads to an almost total quenching of this already rather unlikely process. As a result, one would like to develop techniques to make silicon an efficient emitter of visible photons. This will be the requirement if one wants to employ silicon-based devices for optoelectronic rq>plications. 

In-plane emitters with aperture width as small as 20 nm were also designed using micromachining techniques and can be compatible with parallelization, although these silicon-based sources have not yet been used for surface patterning. 

Hybrid integration of light emitters and detectors with SOI-based micro-opto-electro-mechanical (MOEMS) systems, Proc. SPIE 4293, Silicon-Based and Hybrid Optoelectronics III, D.J. Robbins, J.A. Trezza, G.E. Jabbour, Eds., pp. 32-45 (2001). 

Fig. 5. Bipolar transistor (a) schematic and (b) doping profiles of A, arsenic ion implanted into the silicon of the emitter ( -type) B, boron ion implanted into the silicon of the base (p-type) C, antimony ion implanted into the buried layer ( -type) and D, the epi layer...

Let us now consider the charge state of the electrode. The emitter is positively biased. A p-type silicon electrode is therefore under forward conditions. If the logarithm of the current for a forward biased Schottky diode is plotted against the applied potential (Tafel plot) a linear dependency with 59 meV per current decade is observed for moderately doped Si. The same dependency of 1EB on VEB is observed at a silicon electrode in HF for current densities between OCP and the first current peak at JPS, as shown in Fig. 3.3 [Gal, Otl]. Note that the slope in Fig. 3.3 becomes less steep for highly doped substrates, which is also observed for highly doped Schottky diodes. This, and the fact that no electrons are detected at the collector, indicates that the emitter-base interface is under depletion. This interpretation is sup-... 

If VEB is increased, IEB increases and the current density at the electrode eventually becomes equal to JPS. It has been speculated that this first anodic current peak is associated with flat-band condition of the emitter-base junction. However, data of flat-band potential of a silicon electrode determined from Mott-Schottky plots show significant scatter, as shown in Fig. 10.3. However, from C-V measurement it can be concluded that all PS formation occurs under depletion conditions independent of type and density of doping of the Si electrode [Otl]. 

To achieve the lowest possible delay a bipolar switching transistor developed by IBM minimizes parasitic resistances and capacitances. It consists of self-aligned emitter and base contacts, a thin intrinsic base with an optimized collector doping profile, and deep-trench isolation (36). Devices must be isolated from each other to prevent unwanted interactions in integrated circuits. While p—n junctions can be used for isolation, IBM s approach etches deep trenches in the silicon wafer which are filled with Si02 to provide electrical insulation. 

Fig. 3.3. Acoustic micrographs taken in superfluid helium at 0.2 K. (a) Bipolar transistor on a silicon integrated circuit. The aluminium lines making connections to the base and the emitter are 2 fan wide and 0.5 fan thick. Three images were taken at different heights, and superimposed with colour coding. The lens had a numerical aperture N.A. = 0.625 and a depth of focus less than 150 nm, / = 4.2 GHz. (b) Myxobac-terium, with different planes similarly colour-coded and superimposed, / = 8 GHz...

Miniaturized LC/MS formats based on micromachined chip-based electrospray emitters and ionization sources on silicon (Schultz et al., 2000 Licklider et al., 2000 Ramsey and Ramsey 1997 Xue et al., 1997) and plastic (Vrouwe et al., 2000 Yuan and Shiea, 2001, Tang et al., 2001) microchips is a proactive approach for scale-down platforms. Various micromachining processes are used to fabricate these devices. These microanalytical technologies would create integrated sample preparation and LC/MS applications. The potential benefits of such a system include reduced consumption of sample/reagents, low cost, and disposability. 

Figure 5.9 Novel fabrication process for the second generation of micromachined electrospray emitter tips silicon support wafer (blue), 200 nm thick nickel etch-release layer (white) which is patterned using a HN03-based wet etch, negative photoresist SU-8 which forms the micro-nib support layer and tip which hosts the capillary slot (gold) and single photolithographic masking layer which defines the reservoir and tip (black).

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