Sample-and-hold ADC

Fast sample-and-hold ADCs are expensive to produce, because as the digitization rate increases, the operations have to be completed more rapidly. As the number of bits increases, more operations have to be done in the time before a new voltage is captured. Nonetheless, many instrument vendors continue to use sample-and-hold ADCs in their instruments. The technology is extremely reliable and very well understood. Sample-and-hold ADCs are appropriate for fast detectors such as mercury cadmium telluride bolometers, provided that a sampling rate of greater than 400 kHz is not needed. 

Sigma-delta ADCs are not a universal panacea, as they still only acquire data no faster than 200 kHz. Although this appears to be fast, both the interferogram and the laser signal have to be oversampled by as much as an order of magnitude. Hence the actual digitization rate is equivalent to only 20 kHz for a sample-and-hold ADC. At the present time this limits the use of these high-bit ADCs to slower data acquisition rates. 

Just as sample-and-hold amplifiers must be properly adjusted, so must ADCs both range and linearity are generally adjustable. As with sample-and-hold amplifiers, periodic validation of adjustment should be carried out. 

Multifunction boards are commonly used to measure analog signals. It is done by the ADC, which converts the analog voltage level into a digital number that the computer can interpret. The analog multiplexer (MUX), the instrumentation amplifier, the sample-and-hold (S/H) circuitry, and the ADC comprise the analog input section of a multifunction board (see Fig. 18.26). 

A different approach is to use a sample-and-hold circuitry on the analog outputs, and then multiplex them into a single ADC. This significantly increases the ADC conversion rate needed, which requires a significantly higher bandwidth. Since noise is also based on the bandwidth, this also can significantly increase the noise in your system. 

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