Poly n-Silicon Source and Drain Contacts

The inversion layer response, with saturation and pinch-off at large values of V is, is seen for gate voltages greater than +10V. 

A plot of Ids versus Vgs for Vds = -lOV for a MISFET is shown in figure 50. As with the devices fabricated with Au source/drain contacts (figure 42) there is a very rapid increase in I with Vk, as evident fiom tiie almost linear variation of log(Ids) with Vgs. In the non-saturated regime we can use equation 33 to model the transconductance, and we find from this that the carrier mobility is, firstly, always greater than that found for the Au source/drain devices, and secondly, rises very quickly with the size of the gate voltage. Thus, the transconductance for Vqs = 45 and -50V is estimated to be 9,29 and 840 

---

Figure 44 MISFET structure with poly n-silicon source and drain contacts with polyacetylene layer thickness of 20 nm. Shown here is the variation of Ids with Vgs for Vds =+10 V.

---