Symmetric multiprocessor

As noted above, one of the goals of NAMD 2 is to take advantage of clusters of symmetric multiprocessor workstations and other non-uniform memory access platforms. This can be achieved in the current design by allowing multiple compute objects to run concurrently on different processors via kernel-level threads. Because compute objects interact in a controlled manner with patches, access controls need only be applied to a small number of structures such as force and energy accumulators. A shared memory environment will therefore contribute almost no parallel overhead and generate communication equal to that of a single-processor node. 

Shared memory computers in which all processors have equal access to all memory in the system are referred to as symmetric multiprocessors (SMP), and may also be called uniform memory access (UMA) computers. In the node shown in Figure 2.15, references to memory may need to pass through one, two, or three crossbar switches, depending on where the referenced memory is located. Thus, this node technically has a nonuniform memory access (NUMA) architecture, and, since the node is cache-coherent, this architecture is called ccNUMA. However, since the crossbar switches in the quad-core AMD Opteron implementation of ccNUMA exhibit high performance, this particular node would typically be considered to be an SMP. 

In 1958, computer scientistsjohn Cocke and Daniel Slotnick of IBM described one of the first uses of parallel computing in a memo about numerical analysis. A number of early computer systems supported parallel computing, including the IBM MVS series (1964-1995), which used threadlike tasks the GE Multics system (1969), a symmetric multiprocessor the ILLIAC IV (1964-1985), the most famous array processor and the Control Data Corporation (CDC) 7600 (1971-1983), a supercomputer that used several types of parallelism. 

Symmetric multiprocessor A parallel computer with multiple, similar, interconnected processors controlled by a single operating system, and with each processor having equal access to all I/O devices. 

A switch to connect the nodes. The Butterfly series of shared memory parallel computers manufactured by BBN made use of a type of switch shown in Fig. 12 which connected each processor to every memory unit. Switch-type connections are currently used in symmetric multiprocessors (SMPs). An SMP is a parallel computer in which each processor has equal access to aU I/O devices (including memory). SMPs form the basis of IBM s ASCI White computer, which is currently the fastest in the world. The ASCI White machine is made up of 512 SMP nodes, each with 16 processors, for a system total of 8192 processors. 

In 1995, researchers at Berkeley and elsewhere had argued that networks of commodity workstations (NOWs) offered potential advantages over high-performance symmetrical multiprocessors (Anderson et al., 1995). The advantages would include better scalabihty, cost-effectiveness, and potential high availabihty through inexpensive redundancy. 

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