Minimum device feature size

Figure 1.20. Microlithographic trends in minimum device feature size and imaging technology. The figure illustrates the time evolution of random access memory (RAM) devices.

Figure 2. A plot showing a chronology of minimum device feature size achievable.

The MOSFET, the most important microelectronic device, can be reduced in dimension to reach a minimum feature size of 0.1 micron but even lower dimensions (0.05 microns) are foreseen, as demonstrated by recent advanced experiments. 

Graphical representation of the minimum feature size vs. year of commercialization for MOS devices. 

Figure 1. Minimum feature size on a MOS random access memory device as a function of the year the devices were first commercially available.

C Linewidth Control, This parameter refers to the necessity of maintaining the correct features size across an entire substrate and from one substrate to another. This is important since the successful performance of most devices depends upon control of the size of critical structures, as for example in the gate electrode structure in an MOS device. As feature size is decreased and circuit elements packed closer together, the margin of error on feature size control is reduced. The allowable size variation on structures is generally a fixed fraction of the nominal feature size. A rule of thumb is that the dimensions must be controlled to tolerances of at least 1/5 the minimum feature size. Linewidth control is affected by a variety of parame-... 

Figure 2. Minimum feature size on MOS random access memory devices as a function of year of commercial availability. (Reproduced with premission...

Most microelectronic facilities can readily achieve minimum feature sizes on the order of 10 pm or better. State-of-the art facilities can produce devices with feature sizes of a few tenths of a micrometer. The lower limit is still decreasing, but the effort required expands exponentially as feature size decreases. Frequently, large numbers of devices can be simultaneously fabricated on the same substrate and subsequently separated by scoring and breaking or sawing the substrate after all processing steps are complete. While complex multilayer devices are possible, most film electrode devices reported to date involve only one or two layers. 

As an example of Si technology, Figure 1 illustrates a packaged 1-megabit dynamic-random-access-memory (DRAM) chip on a 150-mm-diameter Si substrate containing fabricated chips. Each of the chips will be cut from the wafer, tested, and packaged like the chip shown on top of the wafer. The chip is based on a l- xm minimum feature size and contains 2,178,784 active devices. It can store 1,048,516 bits of information, which corresponds to approximately 100 typewritten pages. 

Figure 1. Reduction of minimum feature size and increase in the number of components per chip as a function of date of introduction into manufacture for DRAM devices.

Applied substrates require homogeneous and planar surfaces. Planar supports allow accurate scanning and imaging, which rely on a uniform detection distance between the microarray surface and the optical device. Planar solid support materials tend to be impermeable to liquids, allowing for a small feature size and keeping the hybridization volume to a minimum. Flat substrates are amenable to automated manufacture, providing an accurate distance from photo masks, pins, ink-jet nozzles and other manufacturing implements. The flatness affords automation, an increased precision in manufacture, and detection and impermeability. Table 1 shows frequently used support materials... 

This increase in circuit density is made possible only by decreasing the minimum feature size on the chip. Figure 2 illustrates the decrease in minimum feature size as a function of time for dynamic random access memory (DRAM) devices. In 1975, the 4-kilobit DRAM (4 X 10 memory cells or about 8.2 X 10 transistors) had features in the 7-9-(xm range, and by 1987,... 

Figure 2. Minimum feature size as a function of time for DRAM devices.

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