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Microvia fabrication

However, a greater emphasis will be placed on the laser-drilling process laser via hereafter) since it is the most popular process today and it seems its popularity will grow in the future. It must be understood that via hole formation is just one element of fabricating HDI wiring boards. Fabrication of HDI wiring boards with microvia holes involves many new processes not common to conventional board fabrication. Therefore, additional emphasis will be placed upon these new fabrication processes that are common to other microvia technologies. [Pg.472]

Aramid-reinforced laminate and prepreg allow fast microvia hole formation and at the same time maintain the performance characteristic of a smooth surface for fine-line conductor imaging. The ablation speed of non-woven (aramid) laminates and prepregs is close to that achieved when using nonreinforced materials such as resin-coated foil, dry film, or liquid dielectrics. Since aramid laminates are very stable, they allow the fabrication of doublesided, very thin, etched innerlayers, which are then pressed to a multilayer package in a single... [Pg.489]

When the diameter/thickness conditions are not met, it is necessary to fill the holes using a separate process. A screening process does this from one side of the panel with polyester screen with an oversized hole pattern. After hole filling and curing the resin completely, the fabricator removes excess resin using a belt sander ( 600 to 800) or a ceramic brush. Figure 22.16 illustrates the process.This is a tricky but necessary operation for microvia board makers, particularly for photovia processing. [Pg.491]

One important step in microvia hole board fabrication when resin is the dielectric choice, whether the process is photovia or laser via, is the removal of residual catalysts (normally palladium) entrapped in a microporous surface that can cause migration.The process used in this step is normally a trade secret. [Pg.495]

Since TMA measures Tg as a function of the expansion of the material, and will also provide the z-axis CTE, it is the method fabricators use most commonly for Tg determination to infer a materials thermal stabUity during assembly. For dielectric materials used for the formation of HDI layers (thinner layers, = 0.006 in., adjacent to or forming the outerlayer, and having microvias to provide interconnection with the balance of the construction), IPC-4104 states that the preferred method for determining Tg and CTE above and below Tg is Test Method 2.4.24.5. [Pg.621]


See other pages where Microvia fabrication is mentioned: [Pg.482]    [Pg.482]    [Pg.476]    [Pg.477]    [Pg.483]    [Pg.488]    [Pg.490]    [Pg.501]    [Pg.505]    [Pg.642]    [Pg.147]   
See also in sourсe #XX -- [ Pg.22 , Pg.34 ]




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