Fabrication paste deposition process

Figure 25.3 Scheme of the three major steps of FET fabrication. After preparing source drain contacts by Ag paste (a) the gate insulator is fabricated by a two-step temperature process of para-cyclophane (b). Finally, by thermal evaporation of Au the top-gate contact of 20 nm thickness is deposited (c). An image of the resulting structure is shown in (d) for a DIP crystal FET. 

Chemical reactions initiated in gas discharges and plasmas, in particular in low-temperature, nonequilibrium plasmas, have become indispensable for the advancement of many key technologies in the past 10-15 years (see, e.g Becker et al., 1992 Garscadden, 1992). The plasma-assisted etching of microstructures and the deposition of high-quality thin films with well-defined properties have become crucial steps in the fabrication of microelectronic devices with typical feature sizes of less than 0.5 /rm. The manufacture of state-of-the-art microchips now involves hundreds of process steps, most of them serial, to yield circuits with millions of discrete elements and interconnections in an area of a single square centimeter (Garscadden, 1992). Each step is a physical-chemical interaction that must be controlled. More than one-third of the process steps rely on plasma... 

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