Electronic devices, solution processing

Although high-performance TFTs are needed for several electronic applications, the potential for printed, inorganic electronics encompasses other devices and applications. A major opportunity is in optoelectronic applications, which impose different requirements, challenges, and opportunities (see Chapters 6, 7, 9, and 11 for discussion of solution-processed solar cells and other printed optical devices). 

All standard cleaning processes for silicon wafers are performed in water-based solutions, with the exception of acetone or (isopropyl alcohol, IPA) treatments, which are mainly used to remove resist or other organic contaminants. The most common cleaning procedure for silicon wafers in electronic device manufacturing is the deionized (DI) water rinse. This and other common cleaning solutions for silicon, such as the SCI, the SC2 [Kel], the SPM [Ko7] and the HF dip do remove silicon from the wafer surface, but at very low rates. The etch rate of a cleaning solution is usually well below 1 nm min-1. 

A representative example for the information extracted from a TRMC experiment is the work of Prins et al. [141] on the electron and hole dynamics on isolated chains of solution-processable poly(thienylenevinylene) (PTV) derivatives in dilute solution. The mobility of both electrons and holes as well as the kinetics of their bimolecular recombination have been monitored by a 34-GHz microwave field. It was found that at room temperature both electrons and holes have high intrachain mobilities of fi = 0.23 0.04 cm A s and = 0.38 0.02 cm / V s V The electrons become trapped at defects or impurities within 4 ps while no trapping was observed for holes. The essential results are (1) that the trap-free mobilities of electrons and holes are comparable and (2) that the intra-chain hole mobility in PTV is about three orders of magnitude larger than the macroscopic hole mobility measured in PTV devices [142]. This proves that the mobilities inferred from ToF and FET experiments are limited by inter-chain hopping, in addition to possible trapping events. It also confirms the notion that there is no reason why electron and hole mobilities should be principally different. The fact... 

In the positive branch of the i/V graph, anodic dissolution process will remove material from silicon crystals. The conditions for optimal etching of silicon have been extensively explored for micromachining or surface polishing in the fabrication of electronic devices. Most generally, the etch rate of silicon in HE solutions is isotropic among the various crystalKne orientations. The etch rate of silicon at room temperature at the open-circuit potential (OCP) is very low, on the order of 10 nm s , which is equivalent to 100 nA cm , in aqueous HE solutions. 

The term etching refers to the dissolution processes at OCP of silicon samples immersed in an electrolyte solution. The technique has been extensively explored for its useful applications in the fabrication of electronic devices, surface polishing, and micromachining. For example, it is widely used for the production of cantilevers for the AFM technology. 

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