Electrically erasable programmable read

To minimize the risk of data loss because of power failure or other reasons, the Mossbauer data are copied to a nonvolatile EEPROM (Electrically Erasable Programmable Read-Only Memory) every 9 minutes (software selectable). As the size of the EEPROM is smaller than the SRAM, the EEPROM can accumulate only up to ten Mossbauer spectra as a subset of the data from the SRAM. These spectra are obtained from the SRAM according to a pre-defined summation strategy. 

EEPROM, electrically erasable programmable read-only memory - a FLASH memory. 

EEPROM Acronym for Electrically Erasable Programmable Read-Only Memory. A memory chip that maintains its contents without electrical power, and whose contents can be erased and reprogrammed either within the computer or from an external source. EEPROMs are used where the application requires stable storage without power but may have to be reprogrammed. 

Electrically Erasable Programmable Read-Only Memory See EEPROM. 

Flash memory is read and write memory, and data memories do not disappear even through loss of electric power. Therefore, flash memories are widely applied to USB memory, SD memory card, smart media, and compact flash. Flash memory is also applied to hard disks for computers. NAND flash is NAND (NOT AND gate) flash memory. EEPROM is electrically erasable programmable read-only memory, which is called flashed ROM. 

Fig. 5.17. Functional diagram of the electronic radon gas personal dosimeter DOSEman. MCA multi-channel analyser, EEPROM electrically erasable programmable read only memory, IrDA infrared inteface.

ELECTRICALLY ERASABLE PROGRAMMABLE READ-ONLY MEMORY (EEPROM)... 

The first use of an execution redundancy can be used to detect memory failures. To do this, one program is loaded into two different memory areas (two different addressing areas of the memory, two different memory media, etc.). Therefore, memory failure (RAM, ROM (read-only memory), EPROM (erasable programmable ROM), EEPROM (electrically erasable programmable ROM), etc.) can be detected alongside intermittent failures of the processing unit. 

The level of application safety is then based, in part, on the effectiveness of the embedded self-tests, or rather their coverage rate. These self-tests should cover all the faults concerning memory (RAM (random access memory), ROM (read-only memory), EEPROM (electrically erasable programmable ROM), etc.) and the instructions and addressing modes. We can for example use a 16 bit CRC to verify the integrity of the ROM, a reading/writing test of the AAh/55h type for the RAM and a BIST (built-in self-test) supplied by the micro-vendor for the instruction set. The test interval must be defined to ensure detection of faults before they lead to a critical failure. 

---